Automated IC Verification via Formal Methods
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Solution Overview
Problem
The development of electronic circuits, particularly analog circuits, is a time-consuming and costly process due to the need for manual design and verification of circuit schematics and test systems, which hampers efficiency and scalability.
Innovation Solution
The implementation of automated techniques that generate customized test programs and verify transistor level schematics based on parameterized circuit configurations, allowing for the automatic conversion of test routines into executable code for both electronic design automation (EDA) systems and physical semiconductor circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual design and verification of circuit schematics is performed, then design quality and reliability can be ensured, but development time and cost increase significantly
Solution Approach 1:
The system enables automated self-verification of circuit schematics through formal methods. The verification system automatically checks circuit designs against specifications and requirements, allowing the design process to self-validate without extensive manual intervention. This maintains reliability while reducing the time and expert resources needed for verification.
Solution Approach 2:
Manual mechanical verification processes are replaced with automated computer-based formal verification systems. The system uses algorithmic methods to automatically prove circuit correctness, substituting the need for manual expert review with automated computational verification that maintains thoroughness while significantly reducing time requirements.
2Reliability
If expert engineers manually create test systems, then comprehensive verification coverage is achieved, but the process becomes tedious and expensive
Solution Approach 1:
The verification system automatically generates test cases and verification protocols from circuit specifications. The system serves itself by automatically creating the test infrastructure needed to verify circuit designs, eliminating the need for experts to manually craft test systems while maintaining comprehensive verification coverage through systematic automated case generation.
Solution Approach 2:
The formal verification system provides a universal platform that handles multiple verification tasks automatically. It can generate test cases, verify circuit behavior, check specifications, and validate designs across different circuit types using the same automated framework, making test system development easy while maintaining thorough verification.
3Productivity
If automated verification techniques are implemented, then development time and cost are reduced, but the complexity of the verification system increases
Solution Approach 1:
The system introduces formal specifications as an intermediary layer between the circuit design and verification processes. These specifications serve as a formal contract that automatically guides the verification system, simplifying the automation process by providing clear, machine-readable requirements that the automated verifier can systematically check without needing to understand complex circuit semantics.
Solution Approach 2:
The verification system is segmented into modular components: specification writing, formal verification, and test case generation. This segmentation allows each component to be independently developed and managed, reducing the overall system complexity while enabling automated verification. The modular approach lets productivity increase through automation without requiring the entire verification system to be simultaneously complex.
Data Source
AI summary
Embodiments of the present disclosure pertain to techniques for generating and/or verification of integrated circuits. In one embodiment, parameter values of functional circuit components to be generated are used to select behavioral models having model parameters corresponding to the functional circuit component being generated. In some embodiments, data obtained from physical circuits comprising functional circuit components is used in predefined behavioral models of the functional circuit components.