IC Voltage Bin Sorting for Power Optimization

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Solution Overview

Problem

Manufacturing variations in integrated circuit production lead to performance differences among chips, resulting in some chips not meeting performance specifications due to variations in parameters like channel length, width, or threshold voltages, causing inefficiencies in power usage and reliability.

Innovation Solution

The method involves sorting integrated circuit devices into 'slow' and 'fast' bins based on manufacturing process variations, applying bin-specific reliability testing processes such as enhanced voltage screening, dynamic voltage screening, and burn-in testing to identify and remove defective devices, thereby optimizing power usage by operating fast devices at lower voltages and slow devices at higher voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If integrated circuit devices are sorted into voltage bins based on performance, then power usage is optimized by running fast devices at lower voltage, but device complexity increases due to bin-specific testing processes

Engineering Contradiction:
Improvepower usageVSAvoidtesting process complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by establishing different voltage bins (e.g., 0.8V, 0.9V, 1.0V) based on device performance characteristics. Fast devices are assigned to lower voltage bins while slow devices are assigned to higher voltage bins, optimizing power consumption. The testing parameters (voltage levels, test durations) are specifically adjusted for each bin to balance complexity and effectiveness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the integrated circuit device population into distinct voltage bins based on performance measurements. Each bin receives tailored reliability testing protocols appropriate to its voltage characteristics. This segmentation allows fast devices to be tested at lower voltages with reduced testing requirements, while slow devices receive more stringent testing at higher voltages, optimizing both power usage and testing efficiency.

Inventive Principle:
Principle #1Segmentation

2Productivity

If bin-specific reliability testing is implemented for each voltage bin, then yield is enhanced by reducing scrap rates, but testing time increases

Engineering Contradiction:
ImproveyieldVSAvoidtesting time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements partial action by applying different levels of testing intensity to different voltage bins. Fast devices in lower voltage bins undergo less stringent reliability testing compared to slow devices in higher voltage bins. This partial action approach reduces overall testing time while maintaining high yield by focusing comprehensive testing only where necessary (on slow devices that are more prone to failures).

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

Testing parameters such as voltage levels, test durations, and stress conditions are dynamically changed based on the voltage bin assignment. Fast devices are tested at their operational voltage with standard protocols, while slow devices undergo accelerated stress testing at higher voltages. This parameter adaptation optimizes the balance between testing thoroughness and time consumption.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If fast integrated circuit devices are operated at lower voltage, then power consumption is reduced, but reliability testing becomes more challenging

Engineering Contradiction:
Improvepower consumptionVSAvoidtesting difficulty
Core Design Contradiction:
Use of energy by moving objectVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies preliminary action by performing performance characterization and voltage bin assignment during the manufacturing testing phase, before devices are deployed. Fast devices are identified and assigned to lower voltage bins through preliminary speed measurements. This preliminary classification enables optimized power operation while simplifying field testing, as devices are pre-categorized according to their voltage requirements and reliability characteristics.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces voltage bin classification as an intermediary mechanism between device performance variation and power optimization. This intermediary categorization system translates complex performance differences into discrete voltage groups, making testing and power management more manageable. The bin assignment acts as a mediator that simplifies the relationship between device speed, voltage, and reliability requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If slow integrated circuit devices are assigned to higher voltage bins, then performance specifications are met, but maximum power increases

Engineering Contradiction:
Improveperformance specification complianceVSAvoidmaximum power
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent applies local quality by assigning different voltage levels to different device populations based on their individual performance characteristics. Slow devices that require higher voltage to meet performance specifications are localized to higher voltage bins, while fast devices are localized to lower voltage bins. This local quality approach ensures each device operates at the minimum necessary voltage, optimizing the balance between performance compliance and power consumption across the entire device population.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9429619B2Reliability test screen optimization
Publication Date: 2016.08.30 MARVELL ASIA PTE LTD
  • US9429619B2 patent drawing
  • US9429619B2 patent drawing
  • US9429619B2 patent drawing

AI summary

Methods and systems optimize power usage in an integrated circuit design by sorting the integrated circuit devices after manufacture into relatively slow integrated circuit devices and relatively fast integrated circuit devices to classify the integrated circuit devices into different voltage bins. The methods and systems establish a bin-specific reliability testing processes for each of the voltage bins and test the integrated circuit devices using a tester. This allows the methods and systems to identify as defective ones of the integrated circuit devices that fail the bin-specific integrated circuit reliability testing processes of a corresponding voltage bin. The methods and systems remove the defective ones of the integrated circuit devices to allow only non-defective integrated circuit devices to remain and supply the non-defective integrated circuit devices to a customer.