IC Power Supply Voltage Co-Optimization for PPA and Timing Closure
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Solution Overview
Problem
Current IC design processes face challenges in optimizing power supply voltage, which is typically treated as a constant parameter, leading to trade-offs between power consumption and performance, and fail to efficiently manage power consumption and area constraints in compute-intensive applications.
Innovation Solution
The approach involves co-optimizing power supply voltage with other IC design metrics like dynamic power consumption, leakage power, and area by determining relationships between these metrics and voltage levels, allowing for interpolation and independent modification of voltage across different power domains and scenarios, thereby optimizing for performance, power, and area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If power supply voltage is increased to improve clock speed and performance, then processing speed is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by transforming the static power supply voltage into a dynamic parameter that can be adjusted during the design optimization process. The EDA tool modifies power supply voltage across different power domains and operating modes to achieve optimal balance between clock speed and power consumption, rather than treating voltage as a fixed constant.
Solution Approach 2:
The patent implements parameter changes by systematically varying the power supply voltage parameter across multiple values and domains. The EDA tool explores different voltage levels (e.g., 0.8V, 1.0V, 1.2V) and their impact on performance and power metrics, enabling the design to find optimal operating points that balance speed and energy consumption.
2Use of energy by moving object
If power supply voltage is decreased to reduce power consumption, then power efficiency is improved, but clock speed and performance deteriorate
Solution Approach 1:
The patent applies local quality by enabling different power supply voltages in different power domains within the same IC design. Critical performance domains can operate at higher voltages for maximum clock speed, while non-critical domains operate at lower voltages for power efficiency, achieving localized optimization of the voltage-performance-power trade-off.
Solution Approach 2:
The patent enables dynamic voltage adjustment across different operating modes and scenarios. The EDA tool determines optimal voltage levels for each mode (e.g., performance mode, power-saving mode) and transitions between them, allowing the system to adapt voltage levels based on operational requirements rather than using a fixed voltage.
3Device complexity
If EDA tools treat power supply voltage as constant during optimization, then design simplicity is maintained, but power consumption and area optimization are limited
Solution Approach 1:
The patent transforms the static optimization approach into a dynamic one by enabling the EDA tool to modify power supply voltage during the optimization process. The tool automatically explores voltage variations, performs timing analysis at different voltage levels, and determines optimal voltage assignments without requiring manual intervention, maintaining ease of use while achieving superior optimization.
Solution Approach 2:
The patent implements self-service by enabling the EDA tool to autonomously perform voltage co-optimization without requiring manual configuration or expertise from the designer. The tool automatically determines optimal voltage levels, evaluates timing constraints, and generates optimized design configurations, allowing the system to optimize itself rather than requiring external expertise.
4Use of energy by moving object
If multiple power domains operate at different voltage levels, then power efficiency is improved, but design and verification complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the IC design into multiple power domains, each capable of operating at independently optimized voltage levels. The EDA tool automatically segments the design based on functional requirements and timing constraints, assigning appropriate voltage levels to each domain while managing the complexity of multi-voltage design through automated analysis and verification.
Data Source
AI summary
A relationship between at least a first metric of an integrated circuit (IC) design and a power supply voltage of the IC design may be determined based on a set of IC designs that have different power supply voltages. Next, the power supply voltage and at least the first metric of the IC design may be modified by interpolating values of the first metric based on the relationship between the first metric and the power supply voltage of the IC design.