Integrated Circuit Voltage Modulation for Soft Error Reliability
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Solution Overview
Problem
Integrated circuits, such as microprocessors, are susceptible to soft errors caused by cosmic rays or alpha particles, leading to transient malfunctions and significant downtime, with existing solutions like lockstepping incurring performance penalties and being costly to implement.
Innovation Solution
Modulating the power supply voltage and operating frequency of integrated circuits to reduce soft error rates by increasing the power supply voltage and lowering the operating frequency, while maintaining a predetermined power limit, thereby reducing circuit sensitivity to particle charge injection without significantly impacting performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lockstepped processors are used to detect soft errors, then reliability is improved, but productivity deteriorates due to performance penalty of at least 50%
Solution Approach 1:
The patent changes operational parameters (power supply voltage and clock frequency) to reduce soft error susceptibility. By increasing voltage to strengthen signal margins and lowering frequency to reduce switching activity, the system achieves improved reliability without the severe performance penalty of lockstepping.
2Reliability
If hardware is added to detect and correct soft errors in control logic and datapaths, then reliability is improved, but device complexity increases significantly
Solution Approach 1:
Instead of adding complex detection hardware, the patent uses parameter changes (voltage and frequency modulation) to prevent soft errors. This approach improves reliability through physical parameter optimization rather than through additional circuitry, thereby avoiding increased device complexity.
3Reliability
If power supply voltage is increased to reduce circuit sensitivity to particle charge injection, then reliability is improved, but use of energy increases
Solution Approach 1:
The patent dynamically adjusts power supply voltage and clock frequency based on operational conditions. By lowering frequency to reduce switching activity, the system compensates for the energy cost of higher voltage, achieving improved reliability while managing power consumption through dynamic parameter optimization.
Solution Approach 2:
The patent changes the relationship between voltage and frequency parameters. By increasing voltage for reliability while simultaneously lowering frequency to reduce switching power, the system optimizes the trade-off between reliability improvement and energy consumption.
4Reliability
If operating frequency is lowered to maintain power limit when voltage is increased, then reliability is improved, but productivity decreases
Solution Approach 1:
The patent optimizes the voltage-frequency parameter relationship to achieve better reliability with minimal productivity loss. By carefully selecting the frequency reduction that corresponds to voltage increase, the system maintains power within limits while achieving improved reliability with less performance degradation than traditional approaches.
Data Source
AI summary
Techniques are disclosed for increasing reliability of an integrated circuit. In one embodiment, an integrated circuit includes core chip circuitry. The integrated circuit includes means for increasing a power supply voltage V provided to the core chip circuitry, such as by increasing the voltage V to a maximum value. The integrated circuit also includes means for identifying a clock frequency F for which F<Pmax/(CV2), where C is a switching capacitance and where Pmax is a predetermined maximum power consumption of the core chip circuitry. The integrated circuit also includes means for providing a clock signal having frequency F to the circuit.