IC Wire Alignment with Multi-Target Path Difference
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional Electronic Design Automation (EDA) tools for integrated circuit (IC) design are limited in their wire alignment functionality, often resulting in misalignments and incorrect spacing between wires due to the ability to select only a single target for alignment, leading to suboptimal wire pair alignments.
Innovation Solution
The system identifies multiple references and targets in a set of wires, calculates path differences between reference-target pairs, and aligns wires based on these differences while maintaining minimum spacing rules, allowing for user-defined customization of spacing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single target is selected for alignment in conventional EDA tools, then the alignment process is simple and fast, but misalignments and incorrect spacing occur between wire pairs
Solution Approach 1:
The patent segments the alignment process by identifying multiple reference target pairs instead of using a single target. Each wire is aligned to its corresponding target independently, dividing the alignment task into multiple precise sub-tasks that avoid the misalignment issues of single-target approaches
Solution Approach 2:
The patent changes the alignment parameters by calculating path differences for each reference target pair and using these differential parameters to determine precise wire positions. This parameter-based approach ensures minimum spacing rules are maintained while achieving correct alignment
2Manufacturing precision
If multiple references and targets are identified with path difference calculation, then correct alignment with minimum spacing is achieved, but the alignment process becomes more complex
Solution Approach 1:
The patent implements feedback by calculating path differences for each reference target pair and using these calculations to adjust wire positions. The system continuously evaluates the spacing and alignment status, providing feedback that guides the alignment process to maintain minimum spacing rules
Solution Approach 2:
The patent performs preliminary identification of multiple reference target pairs and calculation of their path differences before executing the actual wire alignment. This preliminary preparation ensures that when alignment occurs, the precise parameters are already determined, reducing complexity during the execution phase
Data Source
AI summary
Embodiments disclosed herein describe systems, methods, and products for aligning wires in an integrated circuit (IC) design. An illustrative computer may identity multiple references in a first set of wires and multiple targets in a second set of wires in the IC design. The computer may determine reference target pairs from the multiple references and multiple targets. The computer may calculate a path difference for each of the reference target pairs and align the corresponding wires based upon the path difference while obeying minimum spacing rules. The computer may also allow a circuit designer to modify or override the computer selected references, targets, or reference target pairs. Embodiments disclosed herein therefore mitigate the alignment problems of shorting and incorrect spacing.