Integrated Circuit Yield Optimization via Worst Corner Analysis
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Solution Overview
Problem
Integrated circuit design yield is affected by environmental and statistical variables, leading to manufacturing challenges as circuit sizes decrease and performance requirements increase, necessitating a method to optimize designs for improved yield.
Innovation Solution
A method and system for designing integrated circuits that analyze worst yield corners based on environmental and statistical variables, using simulation to determine if they meet performance requirements, and further processing the design to finalize it when all corners satisfy the requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If integrated circuit design is optimized for performance requirements, then performance is improved, but yield is reduced due to sensitivity to environmental and statistical variables
Solution Approach 1:
The patent applies preliminary action by performing yield analysis and identifying worst yield corners during the design phase before manufacturing. The system proactively simulates various environmental and statistical variable combinations to predict potential yield issues, allowing designers to optimize the circuit design beforehand rather than dealing with yield problems after production begins.
Solution Approach 2:
The patent implements feedback by using simulation results from worst yield corner analysis to iteratively improve the design. The system continuously loops between simulation, analysis of yield impacts, and design modification, using the feedback from simulated performance under various conditions to refine the design until optimal yield is achieved while maintaining performance requirements.
2Productivity
If comprehensive yield analysis is performed on all possible corners, then yield is improved, but processing time increases significantly
Solution Approach 1:
The patent extracts only the critical worst yield corners from the comprehensive set of all possible corners for detailed simulation. Instead of analyzing every possible combination of environmental and statistical variables, the system identifies and focuses on the specific corner cases that have the most significant impact on yield, thereby reducing processing time while maintaining yield optimization effectiveness.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the set of corners to be analyzed based on preliminary screening results. The system modifies which corners require full simulation by changing the parameters of corner selection, focusing computational resources on the most critical scenarios rather than uniformly processing all corners, thus reducing overall processing time while maintaining yield optimization.
Data Source
AI summary
Method and system for designing integrated circuits for yield are described. Integrated circuits are designed for yield by finding worst yield corners based on design, statistical, and environmental variables and optimizing the design in light of the worst yield corners found.