Identifier Selection Encoding for Hardware Efficiency
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Solution Overview
Problem
Existing methods for selecting a subset of identifiers from a range of up to 2N identifiers are costly to implement in hardware, as they require multiple registers and complex comparison units, making them inefficient, especially in space-constrained systems like system-on-chip (SoC) arrangements.
Innovation Solution
A data processing apparatus using N+1 identifier selection bits, where the position of a marker bit determines M, allowing for efficient encoding of 2M selected identifiers by defining a base identifier and incrementally following identifiers, with N−M bits forming the most significant bits of the base identifier and M bits as trailing zeroes, reducing the need for multiple registers and complex logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple registers and complex comparison units are used to select a subset of identifiers, then the selection accuracy and flexibility are improved, but the hardware cost and device complexity increase significantly
Solution Approach 1:
The patent changes the parameter representation by using a compact N-bit encoded value instead of traditional start/end registers. The encoded value uses bit positioning and trailing zeroes to define both the base identifier and the subset size (2M identifiers) simultaneously, reducing the selection mechanism to simple bitwise operations rather than complex range comparisons
Solution Approach 2:
The patent extracts only the essential selection information into a compact N-bit encoded value, separating the base identifier (from N-M most significant bits) and the subset parameters (M trailing zeroes indicating 2M identifiers) from the full identifier range definition, eliminating the need for complex comparison logic
2Quantity of substance
If a large number of registers are provided to define selected identifiers, then the coverage of identifier subset increases, but the hardware resources and space requirements increase
Solution Approach 1:
The N-bit encoded value serves multiple functions simultaneously: it defines the base identifier, determines the subset size (2M identifiers), and enables the selection logic all in a single compact data structure, replacing what would traditionally require multiple registers and comparison units
Solution Approach 2:
The patent uses parameter encoding where M trailing zeroes in the N-bit value represent log2(M) of the actual identifier count, allowing exponential scaling of selected identifiers (2M) while maintaining linear growth in storage requirements (N bits)
3Adaptability or versatility
If start and end identifier registers are used to define a range, then the identifier selection range flexibility is improved, but the number of registers and comparison logic increase
Solution Approach 1:
The patent introduces an N-bit encoded value as an intermediary representation that captures the essential selection parameters (base identifier and subset size) in a compact form, enabling simple bitwise operations to determine identifier membership without direct comparison to start and end registers
Data Source
AI summary
A data processing apparatus is provided which is configured to select 2M selected identifiers within a possible range of up to 2N identifiers, where M≦N. The data processing apparatus comprises a selection storage unit configured to store N+1 identifier selection bits, wherein a position of a marker bit in the N+1 identifier selection bits determines M, and an identifier selection unit configured to determine the 2M selected identifiers. The 2M selected identifiers are defined by a base identifier and 2M−1 identifiers incrementally following that base identifier. N−M bits of the N+1 identifier selection bits form N−M most significant bits of the base identifier, and M trailing zeroes form the M least significant bits of the base identifier.