Idle Caches as Boot Code Backing Store
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Solution Overview
Problem
Conventional multiprocessor systems face limitations in booting due to the insufficient size of local caches for storing and executing larger boot code images, as they rely on pre-loading boot code into lower-level caches without cache evictions, which restricts the storage footprint and requires system memory to be unavailable during booting.
Innovation Solution
Configuring idle caches from other cores as a backing store memory by designating a boot core and active cache, modifying cache operations to perform lateral cast outs to these backing caches, and enabling Direct Memory Access (DMA) writes to utilize these caches as an extended memory space during the boot phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If boot code is stored in local caches, then booting speed is improved, but storage capacity is limited
Solution Approach 1:
The patent merges the boot code storage function across multiple caches (L2 and L3 caches from different cores) into a unified backing store. By combining the capacity of multiple idle caches, the system achieves significantly larger storage capacity for boot code while maintaining fast access speeds through the cache hierarchy.
Solution Approach 2:
The patent makes idle caches serve multiple functions: they act as both normal runtime caches for active cores and as a backing store for boot code. This multi-functionality allows the same hardware resources to provide both fast execution and extended storage capacity without requiring separate dedicated storage components.
2Quantity of substance
If system memory is used for boot code, then storage capacity is increased, but booting time is increased due to memory initialization requirements
Solution Approach 1:
The patent performs preliminary action by pre-loading boot code into idle caches during system initialization, before the full system memory is ready. This allows the boot code to be available immediately in fast cache memory without waiting for system memory initialization, thereby reducing booting time while maintaining large storage capacity.
Solution Approach 2:
The patent introduces idle caches as an intermediary storage layer between the boot code source and the executing core. These idle caches act as a mediator that provides both large capacity (like system memory) and fast access (like L1 cache), eliminating the need to wait for system memory initialization.
3Quantity of substance
If cache evictions are performed to system memory, then cache capacity utilization is improved, but system memory availability is reduced
Solution Approach 1:
The patent uses copying by creating a mirror image of the cache hierarchy in idle caches. Instead of evicting data to system memory, the idle caches copy the same data structures and eviction behavior, allowing them to function as a independent backing store that doesn't depend on system memory availability.
Data Source
AI summary
The present disclosure may include a processor that uses idle caches as a backing store for a boot code. The processor designates a boot core and an active cache from a plurality of cores and a plurality of caches. The processor configures remaining caches from the plurality of caches to act as a backing store memory. The processor modifies the active cache to convert cast outs to a system memory into lateral cast outs to the backing store memory. The processor copies a boot image to the backing store memory and executes the boot image by the boot core.