ML-Based Idle CPU Core Power-Down in Data Centers

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Solution Overview

Problem

In data centers, idle or underutilized CPU cores consume power, leading to wastage and increased energy consumption, despite conventional power-saving techniques not fully addressing this issue.

Innovation Solution

A machine learning (ML)-based approach is employed to identify and power down idle CPU cores by predicting core requirements based on historical usage data, using models like random forest regression or support vector machines, and updating core states to reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If all CPU cores are kept active in data centers, then computing power availability is maintained, but power consumption increases significantly

Engineering Contradiction:
Improvecomputing power availabilityVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts CPU core states by transitioning between active and idle modes based on real-time workload analysis. The machine learning model continuously monitors core utilization patterns and makes dynamic decisions about which cores should remain active versus which can be powered down, allowing the system to adapt its power consumption to actual computing needs rather than maintaining a static all-cores-active state

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The machine learning model performs preliminary analysis of workload patterns and predicts future computing requirements before making core activation decisions. By analyzing historical and current usage data in advance, the system can proactively prepare the appropriate number of cores for activation, ensuring computing power is available when needed while avoiding premature activation of cores that wouldn't be required

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If machine learning models are deployed to predict CPU core requirements, then idle cores can be identified for power-saving, but system complexity increases

Engineering Contradiction:
Improveenergy savings from idle core identificationVSAvoidsystem complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The machine learning model serves as an intermediary layer between the workload management system and the physical CPU cores. Rather than directly managing complex power states, the ML model processes workload patterns and outputs simplified predictions about core requirements, which then guide the power management decisions. This intermediary approach handles the analytical complexity while keeping the execution layer relatively simple

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs self-service by automatically monitoring its own CPU core utilization patterns and making autonomous decisions about which cores to activate or deactivate. The machine learning model learns from historical data and independently determines optimal core allocation without requiring external intervention or complex manual configuration, reducing the operational complexity despite the sophisticated algorithms involved

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12626157B2Identifying idle-cores in data centers using machine-learning (ML)
Publication Date: 2026.05.12 NVIDIA CORP
  • US12626157B2 patent drawing
  • US12626157B2 patent drawing
  • US12626157B2 patent drawing

AI summary

Apparatuses, systems, and techniques to determine a number of idle cores of a computing device using a machine learning (ML) model based on a set of processes executed by the computing device are described. One method determines a set of processes executed by the computing device and determines, using an ML model, a number of cores of the computing device to be powered down based at least on the set of processes. The method updates a first mode of the number of cores to a second mode in which the number of cores consumes less power than in the first mode.