IEEE 802.1AS Master Timing for Multi-Platform Media Synchronization

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Solution Overview

Problem

Current solutions for synchronized media output across multiple platforms, such as video walls, are costly due to the use of discrete graphics and central processing units, leading to high expenses for even small setups.

Innovation Solution

The implementation of a system using IEEE 802.1AS timing signals to synchronize media presentations across platforms, where one platform acts as a master timekeeper, and application service circuitry ensures all platforms are synchronized with a master timing signal, allowing for autonomous synchronization and media output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If discrete graphics and central processing units are used to achieve synchronized media output, then synchronization reliability is improved, but system cost increases significantly

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses software-based virtual machine copies to replicate platform functionality across multiple virtual instances, eliminating the need for expensive discrete hardware graphics cards for each platform. Each virtual machine can present synchronized media output while sharing underlying hardware resources, thus maintaining synchronization reliability without proportionally increasing system cost.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent implements a universal synchronization mechanism that can serve multiple platforms simultaneously through a single centralized timing source. The master platform's timing signal serves all slave platforms, and the system can dynamically allocate resources across different virtual machine configurations, making the system adaptable to various platform counts and configurations without requiring dedicated hardware for each instance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple discrete video cards are deployed for video wall synchronization, then output synchronization is achieved, but hardware cost escalates to thousands or tens of thousands of dollars

Engineering Contradiction:
Improveoutput synchronizationVSAvoidhardware cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple platform functions into virtual machine instances that share common hardware resources. Instead of deploying separate discrete video cards for each platform, the system consolidates graphics processing into shared hardware that is virtualized across multiple platforms, achieving synchronized output while dramatically reducing hardware costs.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces the mechanical hardware-based synchronization approach (discrete video cards with hardware genlock) with a software-based timing synchronization mechanism. The centralized timing source and virtual machine coordination provide precise synchronization without requiring expensive discrete graphics hardware, substituting mechanical/physical synchronization components with software-controlled timing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10931989B2Multi-output synchronization
Publication Date: 2021.02.23 INTEL CORP
  • US10931989B2 patent drawing
  • US10931989B2 patent drawing
  • US10931989B2 patent drawing

AI summary

Systems and methods of generating a synchronized media content presentation using a plurality of media output systems communicably coupled to a respective plurality of network connected platforms are provided. A first network connected platform receives an IEEE 802.1AS master timing signal generated by “Grand Master” timing circuitry disposed in a second network connected platform. IEEE 802.1AS application service circuitry disposed in the first network connected platform determines an offset between a local timing signal and the receive master timing signal. Talker circuitry disposed in the first network connected platform synchronizes a media content presentation to the master timing signal and communicates a media/master timing signal synchronization signal to each of the network connected platforms. The media/master timing signal synchronization signal includes data representative of a media start location and a media start time referenced to the master timing signal.