Indium Gallium Arsenide Active Channel Composition Grading
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Solution Overview
Problem
Conventional microelectronic transistors face challenges in achieving high carrier mobility and efficient switching due to limitations in material composition and structure, particularly in scaling down transistor size while maintaining performance and reducing defects.
Innovation Solution
The fabrication of indium gallium arsenide active channels with indium rich surfaces and a gallium rich central portion in non-planar transistors, utilizing a compositionally-graded channel region and substructures to enhance carrier mobility and reduce off-state leakage, is achieved through specific deposition processes and epitaxial growth techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If homogeneous composition indium gallium arsenide active channels are used, then manufacturing is simpler, but carrier mobility is lower
Solution Approach 1:
The patent applies composition grading where the indium gallium arsenide active channel has varying indium content across its cross-section. Specifically, the regions adjacent to the gate dielectric have higher indium content (e.g., In0.7Ga0.3As) while the central region has lower indium content (e.g., In0.3Ga0.7As). This local variation in composition optimizes carrier mobility in the high-field regions near the gate while maintaining structural integrity and reducing defects in the bulk material.
2Productivity
If transistor size is reduced for miniaturization, then packaging density increases, but carrier mobility deteriorates
Solution Approach 1:
In scaled-down transistors, the patent maintains high carrier mobility by implementing composition grading specifically in the regions most critical for charge transport. The higher indium content regions are positioned where the electric field is strongest (near the gate dielectric interface), ensuring that miniaturization does not compromise the mobility where it matters most for device performance.
Solution Approach 2:
The patent changes the compositional parameters of the indium gallium arsenide material across the active channel cross-section. By varying the indium fraction from the center toward the surfaces adjacent to the gate dielectric, the material properties are optimized for high-speed operation in miniaturized devices, maintaining high carrier mobility despite reduced overall device dimensions.
3Reliability
If indium content is increased to improve carrier mobility, then electron mobility increases, but defect density increases
Solution Approach 1:
The patent strategically localizes high indium content regions adjacent to the gate dielectric where high electron mobility is most beneficial for charge transport. The central region maintains lower indium content, which reduces the formation of misfit dislocations and other defects that arise from lattice mismatch. This spatial differentiation allows the device to achieve high mobility where needed while minimizing defect density in the bulk material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved electron mobility and faster switching speeds with reduced defect densities, outperforming conventional homogeneous composition indium gallium arsenide active channels by localizing indium rich areas at the surfaces, thereby enhancing transistor performance.
Implementation Method 1
The fabrication of indium gallium arsenide active channels with indium rich surfaces and a gallium rich central portion in non-planar transistors, utilizing a compositionally-graded channel region and substructures to enhance carrier mobility
Implementation Method 2
utilizing a compositionally-graded channel region comprising a material composition of approximately In0.7Ga0.3As... results in improved electron mobility and faster switching speeds by localizing indium rich areas at the surfaces
Data Source
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AI summary
Transistor devices having indium gallium arsenide active channels, and processes for the fabrication of the same, that enables improved carrier mobility when fabricating fin shaped active channels, such as those used in tri-gate or gate all around (GAA) devices. In one embodiment, an indium gallium arsenide material may be deposited in narrow trenches which may result in a fin that has indium rich surfaces and a gallium rich central portion. These indium rich surfaces will abut a gate oxide of a transistor and may result in high electron mobility and an improved switching speed relative to conventional homogeneous composition indium gallium arsenide active channels.