IGBT Buffer Layer Ion Implantation for Hole Supply

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Solution Overview

Problem

In punch-through type IGBTs, the n+ type semiconductor buffer layer interrupts hole supply to the drift layer during turn-off, leading to oscillation and insufficient withstand voltage, as lowering impurity concentration to enhance hole supply compromises voltage integrity.

Innovation Solution

A semiconductor device manufacturing method involving multiple ion implantations of different acceleration energies to form a buffer layer with a trapezoidal impurity concentration profile, ensuring sufficient hole supply to the drift layer while maintaining high withstand voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the impurity concentration of the buffer layer is lowered to increase hole supply at turn-off, then hole supply to the drift layer is improved, but the withstand voltage cannot be ensured

Engineering Contradiction:
Improvehole supplyVSAvoidwithstand voltage
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The buffer layer is divided into multiple regions with different impurity concentrations by performing multiple ion implantations with different acceleration energies. This creates a segmented structure where each region contributes differently to hole supply and voltage blocking, resolving the contradiction between hole supply and withstand voltage requirements

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the buffer layer are given different local impurity concentrations tailored to their specific functions. The lower concentration regions facilitate hole supply while higher concentration regions maintain withstand voltage, allowing each part to optimize its local performance

Inventive Principle:
Principle #3Local quality

2Strength

If the impurity concentration of the buffer layer is maintained high to ensure withstand voltage, then voltage integrity is improved, but hole supply to the drift layer becomes insufficient causing oscillation

Engineering Contradiction:
Improvewithstand voltageVSAvoidhole supply
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The buffer layer is segmented into regions with varying impurity concentrations through multiple ion implantations. This segmentation allows simultaneous achievement of high voltage blocking in certain regions and adequate hole supply in others, eliminating oscillation while maintaining voltage integrity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The impurity concentration parameter is varied across different regions of the buffer layer by changing acceleration energies during ion implantation. This parameter variation enables the buffer layer to simultaneously provide both voltage blocking and hole supply functions that cannot be achieved with a uniform concentration

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively supplies sufficient holes to the drift layer during turn-off while ensuring high withstand voltage, stabilizing electric characteristics and preventing oscillation.

Implementation Method 1

a first conductivity-type impurity is implanted by using multiple ion implantations of different acceleration energies

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

an annealing step for activating impurities

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentEP3082167B1Semiconductor device manufacturing method
Publication Date: 2021.02.17 MITSUBISHI ELECTRIC CORP
  • EP3082167B1 patent drawingFigure 1~2
  • EP3082167B1 patent drawingFigure 3~4
  • EP3082167B1 patent drawingFigure 5~6

AI summary

A first step in which, on a first main surface and a second main surface opposite to the first main surface of a semiconductor substrate, a first conductivity-type impurity is implanted in the second main surface by using multiple ion implantations of different acceleration energies so as to form a first impurity region on the semiconductor substrate, a second step in which a second conductivity-type impurity is implanted in the second main surface using the acceleration energy lower than the multiple ion implantations, and a second impurity region is formed so that a non-implantation region in which the impurity is not implanted is left between that and the first impurity region in the semiconductor substrate, a heat treatment step in which heat treatment is applied to the semiconductor substrate so that a buffer layer is formed by the first conductivity-type impurity, a collector layer is formed by the second conductivity-type impurity, and a non-diffusion region in which the first conductivity-type impurity and the second conductivity-type impurity do not diffuse are left between the buffer layer and the collector layer, and a step in which a collector electrode in contact with the collector layer is formed are provided,