IGBT Buffer Layer for Parallel Operation Stability
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Solution Overview
Problem
High withstand voltage semiconductor devices, specifically IGBTs, face issues with temperature-dependent ON voltage characteristics when operated in parallel, leading to potential malfunction and destruction due to concentrated current flow into IGBTs with lower ON voltage.
Innovation Solution
A semiconductor device with a specific structure including a semiconductor substrate and element configuration that controls current flow between electrodes through a gate electrode-generated electric field, featuring a collector region with a collector diffusion layer, buffer diffusion layer, and drift diffusion layer, and a spike density interface between the substrate and collector electrode within a certain range to ensure positive temperature dependency of the ON voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If IGBTs are operated in parallel, then the current handling capacity is improved, but the current concentrates into IGBTs with lower ON voltage leading to potential destruction
Solution Approach 1:
The invention changes the electrical parameters of the IGBT by introducing a buffer layer with specific impurity concentration (1×10^16 to 1×10^18 atoms/cm³) between the drift layer and collector region. This buffer layer modifies the ON voltage characteristics to exhibit positive temperature dependency, ensuring that as temperature increases, the ON voltage increases rather than decreases, thereby preventing current concentration and enabling reliable parallel operation.
2Speed
If the ON voltage has negative temperature dependency, then the switching speed is improved, but the current concentrates into IGBTs with lower ON voltage causing thermal runaway
Solution Approach 1:
The invention fundamentally changes the temperature dependency parameter of the ON voltage from negative to positive by introducing the buffer layer. The buffer layer's specific impurity concentration range (1×10^16 to 1×10^18 atoms/cm³) creates a depletion region that dominates the voltage characteristics, reversing the temperature coefficient and ensuring thermal stability during high-speed switching operations.
3Power
If the impurity concentration of the drift layer is increased, then the current conduction is improved, but the withstand voltage capability is reduced
Solution Approach 1:
The invention segments the collector region into three distinct layers with different impurity concentrations: the drift layer (low concentration for high voltage), the buffer layer (intermediate concentration for transition), and the collector region (high concentration for current collection). This segmentation allows each layer to optimize its function - the drift layer maintains high withstand voltage while the buffer layer enables improved current conduction without compromising the overall voltage blocking capability.
4Power
If a buffer layer with high impurity concentration is introduced, then the current conduction is improved, but the breakdown voltage is reduced
Solution Approach 1:
The invention precisely controls the impurity concentration parameter of the buffer layer within the range of 1×10^16 to 1×10^18 atoms/cm³. This specific concentration range is critical - it is high enough to improve current conduction by providing additional carriers, but low enough to maintain the depletion region width and breakdown voltage characteristics necessary for high voltage operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a semiconductor device suitable for parallel operation, preventing malfunction and ensuring reliable operation by maintaining positive temperature dependency of the ON voltage, thus preventing concentrated current flow and potential destruction.
Implementation Method 1
The element generates an electric field in a channel by a voltage applied to the gate electrode, and controls a current between the first electrode and the second electrode by the electric field in the channel
Data Source
AI summary
A semiconductor device includes a semiconductor substrate and a MOS transistor. The semiconductor substrate has the first main surface and the second main surface facing each other. The MOS transistor includes a gate electrode (5a) formed on the first main surface side, an emitter electrode (11) formed on the first main surface side, and a collector electrode (12) formed in contact with the second main surface. An element generates an electric field in a channel by a voltage applied to the gate electrode (5a), and controls the current between the emitter electrode (11) and the collector electrode (12) by the electric field in the channel. The spike density in the interface between the semiconductor substrate and the collector electrode (12) is not less than 0 and not more than 3×108 unit/cm2. Consequently, a semiconductor device suitable for parallel operation is provided.