IGBT Defect Layer Depth for Switching Speed and On-Resistance Balance
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Solution Overview
Problem
Existing Insulated Gate Bipolar Transistors (IGBTs) face a trade-off between switching speed and on-resistance, where reducing hole lifetime to increase switching speed also increases on-resistance, making it difficult to achieve a balance between both.
Innovation Solution
A semiconductor device with an insulated gate bipolar transistor structure featuring a defect layer formed at a shallower position in active regions compared to non-active regions, using a material with higher ion stopping power for the emitter common electrode, and employing ion implantation to control hole injection amounts, allowing for differential hole injection between active and non-active regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the lifetime of holes in the n layer is reduced to increase switching speed, then the switching speed is improved, but the on-resistance is increased
Solution Approach 1:
The patent applies local quality by forming a defect layer only in the non-active region of the semiconductor substrate, while keeping the active region free of such defects. This localized approach allows hole lifetime to be reduced in the non-active region (improving switching speed) without affecting the hole injection characteristics in the active region (maintaining low on-resistance). The defect layer is positioned at a deeper level in the non-active region compared to the active region, creating spatially differentiated hole lifetime characteristics that resolve the contradiction between switching speed and on-resistance.
2Speed
If ion implantation is performed to form a defect layer, then the hole lifetime is reduced and switching speed is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent segments the semiconductor substrate into active and non-active regions, and applies ion implantation selectively to the non-active region only. This segmentation allows the defect layer to be formed in a controlled manner without requiring complex masking or multiple implantation steps across the entire substrate. By dividing the treatment area, the manufacturing process becomes more manageable while achieving the desired differential hole lifetime characteristics.
Solution Approach 2:
The patent performs preliminary action by forming the defect layer in the non-active region before final device assembly and testing. This advance preparation allows the hole lifetime characteristics to be established early in the manufacturing process, enabling subsequent processing steps to focus on other critical device parameters without needing to return and adjust the defect layer configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables an IGBT with improved switching speed while maintaining low on-resistance, suppressing parasitic transistor effects and enhancing breakdown resistance, thus achieving a good balance between high switching speed and low on-resistance.
Implementation Method 1
a defect layer in which many crystal defects are introduced is formed in the semiconductor substrate
Data Source
AI summary
An IGBT having a good balance between high switching speed and low on-resistance.Specifically disclosed is an IGBT 10 in which a defect layer 25 is formed in an n layer 102 in an active region 20 and formed in a p-type substrate 101 in a non-active region 40. In other words, the defect layer 25 in the active region 20 is at a shallower position than the defect layer 25 in the non-active region 40 when viewed from the surface. Due to this configuration, the switching speed is increased by reducing the amount of holes injected in the non-active region 40 in the IGBT 10. Meanwhile, the reduction of hole injection amount in the active region 20 is smaller than that in the non-active region 40, and thus increase in the on-resistance is suppressed at that time.