IGBT-Diode Boundary Doping Structure for Lower Reverse Recovery Loss

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Solution Overview

Problem

Conventional semiconductor devices experience increased reverse recovery loss due to carrier stagnation in the boundary region between the IGBT and diode regions during reverse recovery operations, leading to higher reverse recovery currents.

Innovation Solution

A semiconductor device design that includes a second-conductivity-type well region in the boundary region between the IGBT and diode regions, facilitating swift carrier discharge and reducing carrier stagnation, thereby minimizing reverse recovery current and loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a conventional semiconductor device structure is used, then the device can be manufactured with standard processes, but carrier stagnation occurs in the boundary region during reverse recovery operations, increasing reverse recovery loss

Engineering Contradiction:
Improvereverse recovery lossVSAvoidstructure complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The boundary region is segmented into multiple zones with different impurity concentrations (first impurity region, second impurity region, third impurity region) to create a gradient structure that facilitates carrier discharge while maintaining manufacturing feasibility through controlled doping profiles

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The boundary region is given special local quality with a specific impurity concentration profile that differs from both the IGBT region and diode region, creating an optimized transition zone that reduces carrier stagnation without requiring complete redesign of the entire device structure

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the boundary region structure is simplified, then manufacturing is easier, but carriers stagnate in the boundary region during reverse recovery, increasing reverse recovery current

Engineering Contradiction:
Improveboundary region fabricationVSAvoidreverse recovery performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The impurity concentration parameter is changed across the boundary region to create a gradient profile, where the first impurity region has higher concentration than the second, which in turn has higher concentration than the third, optimizing carrier discharge while using standard doping processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces reverse recovery loss by ensuring efficient carrier discharge in the boundary region, enhancing the performance of semiconductor devices during reverse recovery operations.

Implementation Method 1

a boundary region that includes a second-conductivity-type well region formed in the surface layer portion of the first main surface in a region between the IGBT region and the diode region

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS12074161B2Semiconductor device
Publication Date: 2024.08.27 ROHM CO LTD
  • US12074161B2 patent drawing
  • US12074161B2 patent drawing
  • US12074161B2 patent drawing

AI summary

A semiconductor device includes a first-conductivity-type semiconductor layer that includes a first main surface on one side and a second main surface on the other side, an IGBT region that includes an FET structure and a second-conductivity-type collector region formed in a surface layer portion of the second main surface, the FET structure including a second-conductivity-type body region formed in a surface layer portion of the first main surface, a first-conductivity-type emitter region formed in a surface layer portion of the body region, and a gate electrode that faces both the body region and the emitter region across a gate insulating layer, a diode region that a includes second-conductivity-type first impurity region formed in the surface layer portion of the first main surface and a first-conductivity-type second impurity region formed in the surface layer portion of the second main surface.