IGBT-Diode Boundary Well Structure for Reverse Recovery Loss

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Solution Overview

Problem

Conventional semiconductor devices experience increased reverse recovery loss due to carrier stagnation in the boundary region between the IGBT and diode regions during reverse recovery operations, leading to higher reverse recovery currents.

Innovation Solution

A semiconductor device design that includes a second-conductivity-type well region in the boundary region between the IGBT and diode regions, facilitating swift carrier discharge and reducing carrier stagnation, thereby minimizing reverse recovery current and loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a conventional semiconductor device structure is used, then the device can be manufactured with standard processes, but carrier stagnation occurs in the boundary region during reverse recovery operations, increasing reverse recovery loss

Engineering Contradiction:
Improvereverse recovery lossVSAvoidboundary region structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies local quality by introducing a well region with a specific conductivity type and impurity concentration only in the boundary region between the IGBT and diode regions. This localized structural modification targets the specific problem area (boundary region carrier stagnation) without changing the overall device structure, thereby reducing reverse recovery loss while maintaining manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

2Productivity

If the boundary region structure is modified to reduce carrier stagnation, then reverse recovery current is reduced, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvereverse recovery operation efficiencyVSAvoidboundary region fabrication
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent employs parameter changes by adjusting the impurity concentration and conductivity type in the boundary region's well region. By optimizing these parameters (impurity concentration between 1×10^16 to 1×10^18 atoms/cm³, specific conductivity type opposite to the drift layer), the device achieves efficient carrier discharge during reverse recovery while using standard semiconductor manufacturing processes.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces reverse recovery loss by ensuring efficient carrier discharge in the boundary region, enhancing the performance of semiconductor devices during reverse recovery operations.

Implementation Method 1

a boundary region that includes a second-conductivity-type well region formed in the surface layer portion of the first main surface in a region between the IGBT region and the diode region

Methodology Applied
Scientific EffectMinority carrier injection and recombination:

Data Source

PatentUS20240379662A1Semiconductor device
Publication Date: 2024.11.14 ROHM CO LTD
  • US20240379662A1 patent drawing
  • US20240379662A1 patent drawing
  • US20240379662A1 patent drawing

AI summary

A semiconductor device includes a first-conductivity-type semiconductor layer that includes a first main surface on one side and a second main surface on the other side, an IGBT region that includes an FET structure and a second-conductivity-type collector region formed in a surface layer portion of the second main surface, the FET structure including a second-conductivity-type body region formed in a surface layer portion of the first main surface, a first-conductivity-type emitter region formed in a surface layer portion of the body region, and a gate electrode that faces both the body region and the emitter region across a gate insulating layer, a diode region that includes a second-conductivity-type first impurity region formed in the surface layer portion of the first main surface and a first-conductivity-type second impurity region formed in the surface layer portion of the second main surface.