IGBT Diode Carrier Injection Suppression for Breakdown Resistance

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Solution Overview

Problem

Semiconductor devices with insulated gate bipolar transistors and diodes formed on a single substrate face increased recovery current and decreased breakdown resistance due to minority carrier flow, necessitating a solution for improved breakdown resistance during recovery operations.

Innovation Solution

A semiconductor device design where an insulated gate bipolar transistor region and a diode region are provided adjacent to each other on a semiconductor substrate with a drift layer, incorporating a carrier injection suppression layer with a narrower width than the emitter layer to suppress hole injection and prevent latch-up, thereby enhancing breakdown resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If an insulated gate bipolar transistor and a diode are formed on one semiconductor substrate to downsize the inverter device, then the device size is reduced, but the breakdown resistance of the diode decreases due to hole injection from the transistor region

Engineering Contradiction:
Improvedevice sizeVSAvoidbreakdown resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent introduces a carrier injection suppression layer as a separate functional segment between the transistor region and diode region. This layer is selectively formed only in the diode region to suppress hole injection while maintaining the integrated structure benefits. The segmentation allows independent optimization of hole suppression without affecting the overall compact design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The carrier injection suppression layer is selectively formed only in specific regions where hole injection occurs, rather than uniformly across the entire device. This local application targets the problem area (diode region adjacent to transistor) while preserving the performance of other regions, achieving hole suppression with minimal impact on overall device characteristics.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the diode region is designed with standard structure, then manufacturing is simple, but recovery current increases due to minority carrier flow from the transistor region

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidrecovery current
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent modifies the diode region by introducing a carrier injection suppression layer with specific conductivity type and doping concentration parameters. This parameter change suppresses minority carrier flow and reduces recovery current while maintaining compatibility with existing manufacturing processes for forming semiconductor layers.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces recovery current and improves breakdown resistance during recovery operations by suppressing hole injection and preventing latch-up, leading to improved power loss management and operational stability.

Implementation Method 1

due to the flowing of holes being minority carriers from the insulated gate bipolar transistor region to the diode region

Methodology Applied
Scientific EffectMinority carrier flow: Holes

Data Source

PatentUS11462615B2Semiconductor device
Publication Date: 2022.10.04 MITSUBISHI ELECTRIC CORP
  • US11462615B2 patent drawing
  • US11462615B2 patent drawing
  • US11462615B2 patent drawing

AI summary

Provided is a semiconductor device having improved breakdown resistance during recovery operation. A semiconductor device according to the present application is a semiconductor device in which an insulated gate bipolar transistor region and a diode region are provided adjacent to each other. The insulated gate bipolar transistor region includes an emitter layer having a short-side direction in a first direction in a plan view. The diode region includes carrier injection suppression layer having a short-side direction in a second direction in a plan view. In a plan view, a width of the carrier injection suppression layer in the second direction is smaller than a width of the emitter layer in the first direction.