IGBT Diode Lifetime Control Region Segmentation
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Solution Overview
Problem
The existing semiconductor device with an IGBT and diode experiences a degradation in IGBT characteristics due to the protrusion of the lifetime control region from the diode area into the IGBT area, leading to increased on-voltage and steady-state loss, while attempting to suppress reverse recovery loss in the diode and parasitic diode at the border.
Innovation Solution
The semiconductor device design includes an upper-side lifetime control region in the diode area without extending into the IGBT area, utilizing a barrier region and pillar regions in the border inter-trench semiconductor region to delay the turn-on of the parasitic diode, thereby reducing reverse recovery loss without increasing steady-state loss in the IGBT.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the lifetime control region is provided to protrude from the diode area into the IGBT area, then the reverse recovery loss is suppressed, but the on-voltage of the IGBT increases and steady-state loss occurs
Solution Approach 1:
The lifetime control region is segmented into two distinct parts: an upper-side lifetime control region located only in the diode area, and a lower-side lifetime control region located only in the IGBT area. This segmentation prevents the lifetime control region from protruding into the IGBT area while still providing reverse recovery loss suppression in the diode area through the upper-side region.
Solution Approach 2:
Different regions of the semiconductor device are given different qualities: the upper-side lifetime control region in the diode area has high crystal defect density for reverse recovery suppression, while the IGBT area lacks this region to maintain low on-voltage and steady-state loss characteristics.
2Loss of energy
If the lifetime control region is provided above the intermediate depth of the drift region, then the reverse recovery loss is suppressed, but the contribution to IGBT characteristic improvement is small and on-voltage increases
Solution Approach 1:
The lifetime control region is divided vertically into upper and lower segments with distinct functions: the upper-side segment (above intermediate depth) handles reverse recovery loss suppression in the diode area, while the lower-side segment (below intermediate depth) provides IGBT characteristic improvement without increasing on-voltage.
Solution Approach 2:
The upper-side lifetime control region is localized to the diode area only, providing reverse recovery suppression without affecting IGBT on-voltage, while the lower-side lifetime control region is localized to the IGBT area to improve IGBT characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses reverse recovery loss in both the diode and parasitic diode at the border while maintaining low steady-state loss in the IGBT, stabilizing the IGBT performance and reducing diode property variations during mass production.
Implementation Method 1
the lifetime control region is a region having a higher crystal defect density than its surrounding drift region. When carriers in the drift region upon a reverse recovery operation of the diode are efficiently recombined within the lifetime control region, a reverse recovery loss of the diode is suppressed
Implementation Method 2
a barrier region of the n-type located between the body region and the drift region and having an n-type impurity concentration higher than the drift region; and a pillar region of the n-type extending from a position being in contact with the upper electrode to a position being in contact with the barrier region
Data Source
AI summary
In a semiconductor device including an IGBT and a diode, an upper-side lifetime control region, which is provided in the drift region within a range located above an intermediate depth of the drift region, is provided in a diode area and is not provided in an IGBT area. A first inter-trench semiconductor region, which is adjacent to a second inter-trench semiconductor region in a diode area, includes a barrier region of an n-type located between the body region and the drift region and a pillar region of the n-type extending from a position being in contact with the upper electrode to a position being in contact with the barrier region. Each of the second inter-trench semiconductor regions in the diode area does not include the pillar region.