IGBT-Diode Chip Solder Grain Structure for Electromigration Resistance
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Solution Overview
Problem
The integration of IGBT and diode regions into a single chip in semiconductor devices increases current density in the diode region, leading to issues with electromigration (EM) that affect the lifespan of the semiconductor device.
Innovation Solution
A semiconductor device configuration that includes a semiconductor substrate with an IGBT region and a diode region, an upper electrode with an aluminum (Al) and nickel (Ni) layer, and an upper solder with copper (Cu) and tin (Sn) interposed between the upper electrode and an upper conductor, where the grain size of the solder is smaller adjacent to the semiconductor element in the diode region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If IGBT and diode regions are integrated into a single chip, then device integration is improved, but electromigration resistance deteriorates due to increased current density in the diode region
Solution Approach 1:
The patent applies local quality by creating a non-uniform grain size distribution in the solder layer, where the grain size is intentionally made smaller in the diode region compared to the IGBT region. This local differentiation addresses the higher current density in the diode region by providing finer grain structure that offers more grain boundaries to impede electromigration, while maintaining larger grains in the IGBT region where current density is lower.
2Productivity
If current density in diode region is increased due to integration, then device functionality is improved, but alloy layer stability deteriorates due to accelerated electromigration
Solution Approach 1:
The patent implements local quality by varying the grain size of the solder layer across different functional regions. Specifically, the diode region is designed with smaller solder grain size to create more grain boundaries that act as barriers to electromigration, thereby protecting the alloy layer stability in the high current density area while allowing larger grains in regions with lower current stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration delays the disappearance of the alloy layer and the Ni electrode due to EM, thereby improving the EM lifetime of the semiconductor device.
Implementation Method 1
an upper solder interposed between the upper electrode and the upper conductor and joining the upper electrode and the upper conductor
Implementation Method 2
an alloy layer interposed between the upper electrode and the upper solder
Data Source
AI summary
In a semiconductor device, a semiconductor element includes a semiconductor substrate and an upper electrode on a first surface of the semiconductor substrate. The semiconductor substrate has an IGBT region and a diode region. An upper conductor is disposed to face the upper electrode. An upper solder is interposed between the upper electrode and the upper conductor. An alloy layer is interposed between the upper electrode and the upper solder. The upper electrode includes an Al electrode disposed on the first surface and an Ni electrode disposed on the Al electrode. The upper solder contains Cu and Sn. The alloy layer contains Ni, Cu, and Sn. At least in a region overlapping with the diode region in a plan view along a thickness direction of the semiconductor substrate, a grain size of the upper solder is smaller on the semiconductor element side than on the upper conductor side.