IGBT Double Gate Driving for Fast Carrier Ejection
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Solution Overview
Problem
IGBTs face challenges in reducing on-resistance and switching loss due to slow carrier ejection from the n-type drift region during the OFF state, leading to increased turn-OFF time and switching loss.
Innovation Solution
The implementation of a double gate driving technique with independent control of first and second gate voltages, where the second gate voltage is made negative before changing the first gate voltage from turn-ON to turn-OFF, forming a p-type inversion layer in the drift region to enhance hole ejection and reduce carrier accumulation, thereby shortening the turn-OFF time and reducing switching loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If carrier concentration in the n-type drift region is increased to reduce on-resistance, then on-resistance is reduced, but turn-OFF time becomes longer due to slow carrier ejection
Solution Approach 1:
A negative voltage is applied to the gate electrode before the IGBT is turned OFF to preliminarily form a depletion layer in the n-type drift region. This preliminary action creates an electric field that facilitates faster carrier ejection when the device switches OFF, thereby reducing turn-OFF time without sacrificing the low on-resistance achieved through high carrier concentration
Solution Approach 2:
The gate voltage is dynamically controlled with multiple stages: a first gate voltage during ON state to maintain low on-resistance, and a second gate voltage (negative voltage) during turn-OFF to accelerate carrier ejection. This dynamic voltage control allows the device to optimize both on-resistance and turn-OFF time by adapting the electric field conditions to the operational requirements
2Length of stationary object
If carrier concentration in the n-type drift region is increased to reduce on-resistance, then on-resistance is reduced, but switching loss is increased due to prolonged turn-OFF time
Solution Approach 1:
The negative gate voltage is applied in advance before turn-OFF to preliminarily form a depletion layer and create favorable electric field conditions. This preliminary action accelerates the carrier ejection process, thereby reducing the duration of the switching transition and minimizing switching loss while maintaining the low on-resistance benefit
Solution Approach 2:
Dynamic gate voltage control with a second gate voltage (negative voltage) applied during turn-OFF creates an enhanced electric field that accelerates carrier removal from the drift region. This reduces the time during which both voltage and current are simultaneously high, thereby reducing switching loss while preserving the low on-resistance characteristic
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces switching loss and on-resistance by ensuring efficient carrier ejection and reduced carrier accumulation in the drift region, improving the overall performance of the IGBT.
Implementation Method 1
as a result of applying a positive voltage greater than or equal to the threshold voltage to the gate electrode, a channel is formed in the p-type base region
Implementation Method 2
At the same time as when electrons are injected into the n-type drift region from the n-type emitter region, holes are injected into the n-type drift region from the collector region
Implementation Method 3
current flows between the collector electrode and the emitter electrode using both electrons and holes as carriers
Implementation Method 4
the second gate voltage is made negative before changing the first gate voltage from turn-ON to turn-OFF, forming a p-type inversion layer in the drift region to enhance hole ejection and reduce carrier accumulation
Data Source
AI summary
A semiconductor circuit of an embodiment includes semiconductor device and a control circuit. The semiconductor device includes a semiconductor layer that has a first region of a first-conductivity type, a second region of a second-conductivity type, a third region of the first-conductivity type, fourth region of the second-conductivity type, first and second trench, first and second gate electrode, a first gate insulating film in contact with the fourth region, and a second gate insulating film spaced away from the fourth region. The semiconductor device includes a first gate electrode pad connected to the first gate electrode, and a second gate electrode pad connected to the second gate electrode. Prior to changing a first gate voltage from a turn-ON voltage to a turn-OFF voltage, a second gate voltage changed from a first voltage to a second voltage. The second voltage is a negative voltage when the first-conductivity type is p-type.