IGBT Driver Delay Compensation for Faster Gate Switching
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Solution Overview
Problem
Power electronics components experience significant delays in responding to commands, leading to excessive voltage and current variations that can damage or destroy them, and existing solutions fail to adequately compensate for these delays without impacting voltage and current variations.
Innovation Solution
A power stage with a delay compensation circuit that includes conduction initialization and stop initialization delay compensation circuits, using signal diodes, transistors, and capacitors to derive current from the gate resistor, reducing delays t1, t2, t3, t4, and t5 without affecting tf and tr, and maintaining voltage and current variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the delay compensation circuit is implemented to reduce response delays, then the switching frequency is enhanced and conduction losses are reduced, but the circuit complexity increases due to additional components
Solution Approach 1:
The delay compensation circuit performs preliminary actions by anticipating the required gate voltage changes before the power transistor actually responds. The circuit pre-charges or pre-discharges the gate through auxiliary transistors and capacitors, compensating for the inherent delays in the power transistor's response, thereby reducing t1, t2, t3, t4, and t5 delays while enabling higher switching frequencies
Solution Approach 2:
The delay compensation circuit introduces intermediary components (auxiliary transistors Q1-Q4, capacitors C1-C2, and diodes D1-D2) that act as mediators between the driver and the power transistor gate. These intermediaries provide additional current paths and voltage control mechanisms to accelerate gate charging/discharging without directly modifying the power transistor itself
2Speed
If the delay compensation circuit is implemented to reduce response delays, then the switching speed is improved, but the number of components and circuit structure complexity increase
Solution Approach 1:
The delay compensation circuit is segmented into distinct functional modules: conduction initialization compensation (Q1, C1, D1), conduction stop initialization compensation (Q2, C2, D2), and saturation delay compensation (Q3, Q4, D3, D4). Each segment addresses specific delay components (t1-t3 for turn-on, t4-t6 for turn-off), allowing targeted optimization of switching speed while maintaining manageable circuit structure through modular organization
3Loss of time
If the delay is reduced by charging or discharging the power electronics component, then the response time is improved, but the voltage and current variations increase which can damage the component
Solution Approach 1:
The delay compensation circuit incorporates feedback mechanisms where the state of the power transistor (through collector-emitter voltage detection) controls the operation of auxiliary transistors. This feedback ensures that compensation actions are applied appropriately and only when needed, preventing excessive voltage and current variations while effectively reducing response delays t1-t6
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces delays in power transistor initialization and shutdown, enhancing switching frequency and reducing conduction losses while preventing voltage and current variations that could harm the component.
Implementation Method 1
a first capacitor C1 having to be charged, a large voltage difference is observable between the voltage at the control and the voltage at the first capacitor C1. From then on, a current derived from the gate resistance Rg can be observed with a redirection of the current, coming from the driver, towards the first capacitor C1 and towards the first passing diode D1.
Implementation Method 2
position: in derivation of the gate resistance Rg, a first passing diode D1 as well as a first capacitor C1, both in derivation... a second passing diode D2 in series with a second capacitor C2 connecting the collector c to the gate g of the power transistor 6.
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
The invention relates to a power stage (20) comprising a power transistor (60) and a driver (40), the power transistor (60) comprising a collector (c'), a gate (g') and an emitter (e') and being configured to switch from a saturated state to a cut-off state and vice versa according to a command from the driver (40), the power stage (20) comprising a resistor Rg positioned between the driver (40) and the gate (g'), the power stage (20) comprising a delay compensation circuit (80) positioned in parallel with the resistor Rg, comprising: - a conduction start-up delay compensation circuit (82), configured to divert the current through the resistor Rg during the initial saturation of the power transistor (60), - a conduction stop-start delay compensation circuit (84), configured to divert the current through the resistor Rg during the initial cut-off of the power transistor. (60),- a delay compensation circuit configured to divert the current through resistance Rg when the power transistor is close to the saturated state (86).