IGBT Dual-Gate Control Circuit for Pulse Width Alignment

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Solution Overview

Problem

The existing semiconductor device with two independently controllable insulated gate terminals experiences issues where the IGBT remains in a continuous ON state instead of intermittently switching between ON and OFF states, and is inadvertently turned on twice for a single on-pulse signal due to the wide on-period caused by a single control signal.

Innovation Solution

A semiconductor device is designed with a control signal input terminal, a switching element having two gate terminals, a first delay unit to delay the input signal, and a logical product unit to calculate the logical product of the input signals, ensuring that the IGBT switches correctly between high and low injection modes to avoid continuous ON states and correct pulse width alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single control signal is supplied to two gate electrode extraction portions via a delay circuit, then the IGBT can be controlled with a simple control structure, but the on-period becomes wider than the input pulse width causing continuous ON state or double ON state

Engineering Contradiction:
Improvecontrol structureVSAvoidon-pulse width accuracy
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The control signal path is segmented into two separate paths: one path directly connects the control signal to the first gate terminal, while the other path passes through a delay circuit to the second gate terminal. This segmentation allows independent timing control of each gate terminal, preventing the overlapping ON states while maintaining a relatively simple control structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The delay circuit introduces a predetermined time delay to the control signal before it reaches the second gate terminal. This preliminary timing adjustment ensures that the second gate terminal is activated after the first gate terminal has already been activated, thereby preventing continuous ON state and ensuring the IGBT turns on only once per control pulse.

Inventive Principle:
Principle #10Preliminary action

2Duration of action of moving object

If the on-period of the element is made wider to ensure sufficient conduction time, then the IGBT remains in ON state longer, but it causes continuous ON state instead of intermittent switching

Engineering Contradiction:
Improveconduction timeVSAvoidswitching behavior
Core Design Contradiction:
Duration of action of moving objectVSReliability

Solution Approach 1:

The conduction period is segmented into two distinct phases controlled by separate gate terminals: the first gate terminal controls the initial turn-on and primary conduction phase, while the second gate terminal (with delayed signal) controls a secondary conduction phase. This segmentation ensures the total conduction time is sufficient while maintaining proper intermittent switching behavior through coordinated timing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control system dynamically adjusts the timing of gate terminal activation by introducing a predetermined delay to the second gate terminal. This dynamic timing control allows the IGBT to maintain extended conduction time when needed while automatically returning to OFF state between pulses, ensuring reliable intermittent switching behavior.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10916643B2Semiconductor device, method for controlling semiconductor device, and control circuit for semiconductor device
Publication Date: 2021.02.09 MINEBEA POWER SEMICON DEVICE INC
  • US10916643B2 patent drawing
  • US10916643B2 patent drawing
  • US10916643B2 patent drawing

AI summary

To provide a semiconductor device in which an IGBT having two gate terminals is driven by one control signal, and a continuous ON state and an ON state twice for one on-pulse signal are avoided. A semiconductor device includes: a control signal input terminal; an IGBT having a first gate terminal and a second gate terminal; a delay unit configured to delay an input signal for a delay time; and a logical product unit configured to calculate a logical product of a first input terminal and a second input terminal. The control signal input terminal is connected to an input terminal of the delay unit and a second input terminal of the logical product unit. An output terminal of the delay unit is connected to the first gate terminal of the IGBT and a first input terminal of the logical product unit. An output terminal of the logical product unit is connected to the second gate terminal of the IGBT.