IGBT Emitter Region Segmentation for Latch-up Prevention
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Solution Overview
Problem
Insulated gate bipolar transistors (IGBTs) face challenges in maintaining breakdown resistance during turn-off operations, particularly when increasing current density to reduce chip size, as current concentration can lead to latch-up and device breakdown.
Innovation Solution
The semiconductor device incorporates regions of opposite conductivity types with specific dopant density profiles, including high and low impurity density emitter regions, and a gate electrode in contact with these regions via an insulating film, which helps in forming conduction channels and suppressing latch-up by controlling potential differences and current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If current density is increased to reduce chip size, then productivity and device integration are improved, but breakdown resistance deteriorates due to current concentration causing latch-up
Solution Approach 1:
The patent applies local quality by creating emitter regions with different impurity densities (first and second impurity densities) in different locations. The first emitter region has a higher impurity density while the second has a lower impurity density, allowing current to be distributed across regions with optimized local properties. This prevents current concentration in high-density areas that would cause latch-up, while maintaining overall high current density for compact chip design.
Solution Approach 2:
The patent changes the impurity density parameter across different emitter regions to resolve the contradiction. By varying the impurity density from high in the first emitter region to low in the second emitter region, the device achieves both high current density capability (for small chip size) and improved breakdown resistance (by preventing current concentration through the lower density region).
2Reliability
If uniform high impurity density is used in emitter regions, then electrical conductivity is improved, but latch-up occurs during turn-off due to current concentration
Solution Approach 1:
The patent divides the emitter region into two distinct areas with different impurity densities. The first emitter region maintains high impurity density for good electrical conductivity, while the second emitter region has lower impurity density to prevent current concentration and latch-up during turn-off operations. This local differentiation resolves the contradiction between conductivity and latch-up prevention.
Solution Approach 2:
The emitter region is segmented into multiple sub-regions (first and second emitter regions) with different electrical properties. This segmentation allows the device to simultaneously achieve high conductivity in the first region while using the second region as a latch-up prevention zone, eliminating the need for uniform high impurity density throughout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances breakdown resistance and prevents latch-up, allowing for reliable operation while maintaining low on-resistance, even with increased current density, thus improving the semiconductor device's performance during turn-off operations.
Implementation Method 1
a gate electrode in contact with these regions via an insulating film, which helps in forming conduction channels and suppressing latch-up by controlling potential differences and current flow
Implementation Method 2
regions of first and second conductivity types with specific dopant density profiles, including high and low impurity density emitter regions
Data Source
AI summary
A semiconductor device in an embodiment includes a first region of a second conductivity type between a first electrode and a second electrode and a second region of a first conductivity type between the first region and the second electrode. a third region of the second conductivity type is between the second region and the second electrode. A fourth and fifth region of the first conductivity type are between the third semiconductor region and the second electrode. The fourth and fifth regions are adjacent to each other. A dopant concentration in the fifth region is less than a dopant concentration in the fourth region. A third electrode contacts the second region, the third region, the fourth region, and the fifth region via an insulating film.


