IGBT Auxiliary Emitter Line Impedance Control
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Solution Overview
Problem
Conventional semiconductor devices with parallel-connected series-switching elements face issues with potential differences in the auxiliary emitter line due to imbalances in IGBT chip characteristics, leading to abnormal current flow and potential differences that can damage the auxiliary emitter line.
Innovation Solution
Incorporating wiring lines with high current carrying capacity and low resistance in parallel to the base potential line to prevent current imbalances and potential differences, ensuring stable operation even with characteristic imbalances among IGBT chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple IGBT chips are connected in parallel to increase current carrying capacity, then the current carrying capacity is improved, but potential differences in the auxiliary emitter line cause abnormal current flow and reliability deterioration
Solution Approach 1:
The patent applies the equipotentiality principle by providing a dedicated low-impedance potential equalization path through the auxiliary emitter line that connects the auxiliary emitter terminals of parallel-connected IGBT chips. This path includes a wiring line with sufficiently small impedance to prevent potential differences from developing between the auxiliary emitter terminals, even when current imbalances occur due to characteristic variations among the IGBT chips. By maintaining equipotential conditions, the patent prevents abnormal current flow and ensures reliable operation of the parallel-connected switching elements.
2Reliability
If IGBT chips with characteristic imbalances are connected in parallel, then current imbalances occur leading to potential differences, but using identical chips reduces manufacturing flexibility
Solution Approach 1:
The patent introduces an intermediary element - the auxiliary emitter line with controlled impedance characteristics - that mediates between the parallel-connected IGBT chips with different characteristics. This intermediary path provides a low-impedance return route for imbalance currents, preventing potential differences from developing despite variations in IGBT chip characteristics. The auxiliary emitter line acts as a buffer that allows the use of IGBT chips with a range of characteristics while maintaining stable operation, thus reconciling reliability requirements with manufacturing flexibility.
3Loss of energy
If the auxiliary emitter line has high impedance to reduce power loss, then switching losses are reduced, but potential differences increase causing abnormal current flow
Solution Approach 1:
The patent applies parameter changes by carefully controlling the impedance parameters of the auxiliary emitter line wiring. The wiring line is designed with specific electrical characteristics - sufficiently low impedance to prevent potential differences and abnormal currents, while minimizing power loss through optimized conductor dimensions and materials. By adjusting the impedance parameters within an appropriate range, the patent simultaneously achieves low switching losses and prevention of harmful potential differences, resolving the contradiction between energy efficiency and operational stability.
Data Source
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AI summary
An object of the present invention is to provide a semiconductor device that restrains a potential difference across an auxiliary emitter line that is a wiring in the base potential side of parallel-connected IGBT chips, even though imbalance exists in the characteristics of IGBT chips. A semiconductor device of the invention comprises: two switching circuits, one switching circuit comprising IGBT chips T1 through T4 connected in series and clamping diodes D9 and D10 and another switching circuit comprising IGBT chips T5 through T8 connected in series and clamping diodes D11 and D12. The semiconductor device comprises a wiring line 5 and wiring line 6. The wiring line 5 connects the emitter terminal of the IGBT chip T1 and the emitter terminal of the IGBT chip T5 and has a large current carrying capacity and a lower resistance value than the auxiliary emitter line 1. The wiring line 6 connects the emitter terminal of the IGBT chip T3 and the emitter terminal of the IGBT chip T7 and has a large current carrying capacity and a lower resistance value than the auxiliary emitter line 3, resulting in reduction of the potential difference between the emitter terminals of the IGBT chip T1 and the IGBT chip T5 and reduction of the potential difference between the emitter terminals of the IGBT chip T3 and the IGBT chip T7. Therefore, stable gate driving operation is performed.