IGBT ESD Protection Structure With Antiparallel Diodes

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Solution Overview

Problem

Existing data transmission systems face challenges with electrostatic discharge (ESD) protection due to high trigger voltages and capacitance, which can damage components if not properly dissipated, and current solutions like semiconductor controlled rectifiers (SCRs) have limitations in reducing trigger voltage and capacitance effectively.

Innovation Solution

An insulated-gate bipolar transistor (IGBT) device with a specific doping structure and antiparallel diode configuration is proposed, which includes regions doped with different types of charge carriers, a gate structure, and diode structures to function as a stand-alone ESD protection device or trigger, reducing capacitance and allowing for tunable breakdown voltage without snapback.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a MOSFET is used for ESD protection, then the device has high capacitance due to its size and gate oxide, but this high capacitance is undesirable for proper operation

Engineering Contradiction:
ImproveESD protection capabilityVSAvoiddevice capacitance
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The device is segmented into two distinct functional parts: a bipolar transistor component that provides ESD protection with low capacitance, and a MOSFET component that provides voltage clamping without contributing significant capacitance to the signal path. This segmentation allows each component to optimize its function independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bipolar transistor acts as an intermediary between the ESD event and the MOSFET. It triggers the MOSFET to activate only when needed, while the bipolar transistor's own low capacitance ensures it does not load the signal line. The MOSFET's high capacitance is effectively isolated from the signal path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If external triggering is used to reduce trigger voltage in SCR-based ESD protection, then additional components are needed, but this increases device complexity

Engineering Contradiction:
Improvetrigger voltageVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bipolar transistor and MOSFET are merged into a single integrated device structure where the bipolar transistor's base-emitter junction serves as the triggering mechanism for the MOSFET. This eliminates the need for separate external triggering components while maintaining low trigger voltage through the bipolar transistor's inherent characteristics.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If the Gate terminal is connected to one of the terminals in a two-pin ESD protection device, then the connection is simplified, but the capacitance increases due to the thin gate oxide

Engineering Contradiction:
Improveterminal connectionVSAvoidcapacitance
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The gate terminal is extracted from the signal path by connecting it to the bipolar transistor's base, which has low capacitance. The MOSFET's gate oxide capacitance is effectively removed from the signal path, as the gate is not directly connected to either the signal or ground terminal in the traditional sense.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The IGBT device achieves low trigger voltage, reduced capacitance, and higher current density, effectively protecting against ESD events while minimizing parasitic capacitance, thus enhancing the reliability of data transmission systems.

Implementation Method 1

The low capacitance of the pair of antiparallel diode devices hides the high capacitance of the gate oxide of the gate structure

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a first region doped with a first type of charge carriers; a second region doped with a second type of charge carriers different from the first type of charge carriers; a third region doped with the first type of charge carriers; a fourth region doped with the second type of charge carriers

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS20240258299A1Insulated-gate bipolar transistor device as well as a data transmission system implementing such insulated-gate bipolar transistor device
Publication Date: 2024.08.01 NEXPERIA BV
  • US20240258299A1 patent drawing
  • US20240258299A1 patent drawing
  • US20240258299A1 patent drawing

AI summary

An insulated-gate bipolar transistor device is provided including: a first region doped with a first type of charge carriers; a second region doped with a second type of charge carriers different from the first type; a third region doped with the first type; a fourth region doped with the second type; a first, emitter terminal electrically connected with the first region and a second, collector terminal electrically connected with the third region and the fourth region; and a gate structure disposed on the third region with one end adjacent to the second region and with another end adjacent the fourth region; as well as a diode structure having a first diode structure terminal electrically connected with the collector terminal and a second diode structure terminal electrically connected with the gate terminal of the gate structure; and the diode structure is a paired with a antiparallel diode.