IGBT ESD Protection Structure With Low Capacitance Triggering
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Solution Overview
Problem
Existing data transmission systems face challenges with electrostatic discharge (ESD) protection due to high trigger voltages and capacitance issues, which can lead to component damage during ESD events, and current solutions like semiconductor controlled rectifiers (SCRs) do not adequately address these problems.
Innovation Solution
An insulated-gate bipolar transistor (IGBT) device with a specific doping structure and antiparallel diode configuration is proposed, which reduces capacitance, tunes breakdown voltage, and avoids voltage snapback, allowing for effective ESD protection with lower trigger voltage and higher current density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a MOSFET is used for ESD protection, then the device can avoid voltage snapback, but the device capacitance becomes very high due to size and gate oxide
Solution Approach 1:
The device is segmented into two functional parts: an IGBT structure for snapback avoidance and antiparallel diodes for capacitance reduction. The IGBT is divided into specific doped regions (first region with first charge carriers, second region with second charge carriers, third region with first charge carriers, fourth region with second charge carriers) that work together to prevent snapback while the antiparallel diode structure masks the gate oxide capacitance.
Solution Approach 2:
The patent combines different semiconductor structures (IGBT and diodes) into a composite device that leverages the advantages of each component. The IGBT portion provides snapback-free operation while the antiparallel diodes provide low capacitance, creating a hybrid structure that resolves the contradiction between reliability and capacitance.
2Reliability
If external triggering is used to reduce trigger voltage in SCR, then trigger voltage decreases, but device complexity and capacitance increase
Solution Approach 1:
The patent extracts the triggering function from external components and integrates it into the device structure itself. The gate structure is positioned adjacent to the second and fourth regions, allowing direct control of the IGBT without requiring external triggering circuits, thereby reducing both complexity and additional capacitance.
Solution Approach 2:
The patent merges the triggering mechanism with the main protective device structure. The gate structure is integrated adjacent to the doped regions, combining the control function with the protective function in a single unified device rather than separate components.
3Reliability
If diode strings are used to create trigger current, then trigger voltage reduces, but device capacitance increases
Solution Approach 1:
The patent changes the electrical parameters of the device by using specific doping configurations in the four regions. The doped regions create internal electric fields and potential distributions that enable low trigger voltage operation without requiring additional capacitive structures like diode strings.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The IGBT device functions as a stand-alone ESD protection or trigger, reducing overall capacitance and enabling efficient dissipation of ESD events, thereby protecting data transmission system components from damage.
Implementation Method 1
a first region doped with a first type of charge carriers; a second region doped with a second type of charge carriers different from the first type of charge carriers; a third region doped with the first type of charge carriers; a fourth region doped with the second type of charge carriers
Implementation Method 2
When an ESD event occurs in a data transmission system, components of the data transmission system may be damaged if the discharge is not suitably dissipated by the system
Data Source
AI summary
An insulated-gate bipolar transistor device is provided including: a first region doped with a first type of charge carriers; a second region doped with a second type of charge carriers different from the first type of charge carriers; a third region doped with the first type of charge carriers; a fourth region doped with the second type of charge carriers; a first, emitter terminal electrically connected with the first region and a second, collector terminal electrically connected with the third region and the fourth region; and a gate structure disposed on the third region with one end adjacent to the second region and with another end adjacent the fourth region; as well as a diode structure having a first diode structure terminal electrically connected with the collector terminal and a second diode structure terminal electrically connected with the gate terminal of the gate structure.