Trench Gate IGBT Floating Region Breakdown Voltage
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Solution Overview
Problem
The existing insulated gate semiconductor devices, such as trench gate IGBTs, face challenges in achieving a high breakdown voltage due to non-uniform electric field distribution and concentration of electric field at the bottom of the trench gate, which reduces the breakdown voltage and makes it difficult to improve it sufficiently.
Innovation Solution
The solution involves forming a p-type floating region deeper than the trench with a lower impurity concentration than the base region, which is electrically insulated and alternately arranged with the emitter region, and optionally including a field stop region with higher impurity concentration to prevent depletion layer spread and reduce electric field strength at the trench bottom.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a trench gate structure is used to increase channel density and reduce on-voltage, then the on-voltage decreases, but the electric field concentrates at the bottom of the trench gate which reduces the breakdown voltage
Solution Approach 1:
The patent applies local quality by creating a floating region with specifically engineered impurity concentration gradients at the bottom of the trench gate. This localized modification of the semiconductor structure allows the electric field to be distributed more uniformly in the critical breakdown region while preserving the high channel density at the trench gate for low on-voltage operation.
Solution Approach 2:
The patent extends the solution into the vertical dimension by forming a floating region that protrudes from the bottom surface of the trench gate. This three-dimensional structural modification allows the depletion layer to spread laterally at the bottom of the trench, preventing electric field concentration without compromising the vertical channel formation that enables low on-voltage.
2Reliability
If the electric field distribution is made uniform to increase breakdown voltage, then the breakdown voltage increases, but the channel density decreases which increases on-voltage
Solution Approach 1:
The floating region is designed with a specific impurity concentration profile that is lower than the surrounding base region, creating a localized zone that preferentially attracts depletion layer spread. This local modification uniformizes the electric field distribution at the trench bottom without affecting the channel-forming regions, thereby maintaining low on-voltage while achieving high breakdown voltage.
3Reliability
If a floating region is added to uniformize electric field distribution, then the breakdown voltage increases, but the device structure becomes more complex
Solution Approach 1:
The floating region is integrated into the existing trench gate fabrication process by forming it as part of the base region during the same diffusion or ion implantation steps. This merging of the floating region formation with the base region creation minimizes additional manufacturing complexity while achieving the desired electric field uniformization and high breakdown voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a deeper depletion layer spread, reducing electric field strength at the trench bottom and achieving a higher breakdown voltage while maintaining low on-voltage characteristics, thus enhancing the semiconductor device's performance without increasing manufacturing complexity or costs.
Implementation Method 1
a gate insulating film interposed therebetween
Implementation Method 2
an insulated gate bipolar transistor (hereinafter, referred to as an IGBT) which obtains a low on-voltage using a conductivity modulation effect
Data Source
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AI summary
An insulated gate semiconductor device includes a region that is provided between trenches (10) in which a gate electrode (6) is filled through a gate insulating film (5a) in a surface layer of a substrate, includes a p base region (3) and an n+ emitter region (4), and comes into conductive contact with an emitter electrode (8) and a p-type floating region (20) that is electrically insulated by an insulating film (7) which is interposed between the p-type floating region (20) and the emitter electrode (8). The p-type floating region (20) is deeper than the trench (10) and has a lower impurity concentration than the p base region (3).