Two-Stage IGBT Gate Discharge for Surge-Suppressed Turn-Off
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Solution Overview
Problem
Semiconductor devices face challenges in suppressing voltage surges during IGBT switching, which can lead to insulation breakdown, while maintaining adequate gate charge extraction capability to prevent malfunction. Existing technologies struggle to balance these competing requirements.
Innovation Solution
A semiconductor device with a driving circuit comprising a first transistor, a second transistor, a comparator, an AND circuit, and a delay circuit, where the first transistor extracts gate charges with a first force upon IGBT turn-off, and the second transistor extracts with a stronger force after a delayed signal, ensuring the gate voltage is maintained low without excessive voltage surges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate charge extraction capability is strengthened to ensure reliable IGBT turn-off, then malfunction is inhibited, but voltage surge increases causing insulation breakdown risk
Solution Approach 1:
The gate charge extraction process is segmented into two distinct phases: first transistor extracts gate charges with moderate force initially, then second transistor provides stronger extraction force later. This segmentation allows the extraction process to be controlled in stages, preventing sudden strong extraction that causes voltage surge while ensuring complete turn-off reliability.
Solution Approach 2:
The first transistor performs preliminary gate charge extraction before the second transistor activates. This preliminary action reduces the gate voltage gradually in advance, preparing the IGBT for turn-off while avoiding immediate strong extraction that would cause voltage surge. The delay circuit ensures this preliminary action occurs at the optimal timing.
2Object-affected harmful factors
If gate charge extraction capability is weakened to suppress voltage surge, then insulation breakdown is avoided, but IGBT turn-off reliability decreases causing malfunction
Solution Approach 1:
The extraction capability is segmented between two transistors with different extraction strengths. The first transistor provides gentle initial extraction to suppress voltage surge, while the second transistor provides stronger extraction to ensure complete turn-off. This segmentation resolves the contradiction by distributing extraction functions across different stages.
Solution Approach 2:
The gate charge extraction is performed periodically in two stages: first transistor activation period for gentle extraction, followed by second transistor activation period for stronger extraction. This periodic action allows voltage surge suppression followed by reliable turn-off completion.
3Device complexity
If single transistor is used for gate charge extraction, then device complexity is reduced, but inability to balance voltage surge suppression with turn-off reliability
Solution Approach 1:
The single transistor extraction function is segmented into two transistors with distinct roles. This segmentation, while increasing component count, enables precise control of extraction timing and strength, achieving reliable turn-off with voltage surge suppression that a single transistor cannot provide.
Solution Approach 2:
The delay circuit acts as an intermediary between the control signal and the second transistor activation. It introduces precise timing control, ensuring the second transistor activates at the optimal moment when voltage surge has subsided but complete extraction is still needed, balancing reliability and surge suppression.
Data Source
AI summary
A semiconductor device for driving a semiconductor switch, including a first transistor configured to extract gate charges of the semiconductor switch with a first extraction force, a comparator configured to compare gate voltage of the semiconductor switch with a threshold voltage to thereby output a first decision signal, an AND circuit configured to perform an AND operation on a gate voltage of the first transistor and the first decision signal to thereby output a second decision signal, a delay circuit configured to delay the second decision signal by a predetermined time and to output the delayed signal as a second control signal, and a second transistor configured to be turned-on, in response to the second control signal, the predetermined time after the first transistor is turned-on, to thereby extract the gate charges of the semiconductor switch with a second extraction force larger than the first extraction force.