IGBT Gate Drive Timing Control for Lower Switching Loss and Noise

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor element drive devices fail to sufficiently reduce switching loss and noise, especially when the temperature or current flowing through the semiconductor element changes, as they do not account for these variations in their operation.

Innovation Solution

A semiconductor element drive device that includes a current output circuit, a current increasing circuit, and a timing control unit, which adjusts the gate current based on temperature and current conditions, specifically increasing the gate current during a mirror period after the current reaches a given value and before the voltage reaches a given level, to optimize switching speed and reduce losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If gate current is increased to reduce switching loss, then switching speed improves, but noise generation increases

Engineering Contradiction:
Improveswitching speedVSAvoidnoise generation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies dynamics by making the gate current adjustable and time-dependent. The gate current is dynamically changed during the mirror period to optimize switching performance while controlling noise, rather than using a fixed constant current throughout the entire switching process.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies periodic action by implementing gate current modulation specifically during the mirror period, which is a specific phase in the switching cycle. This targeted periodic intervention reduces noise during critical switching transitions while maintaining overall switching efficiency.

Inventive Principle:
Principle #19Periodic action

2Loss of energy

If gate current is increased to shorten switching time, then turn-on switching loss decreases, but turn-off surge voltage increases

Engineering Contradiction:
Improveturn-on switching lossVSAvoidturn-off surge voltage
Core Design Contradiction:
Loss of energyVSStress or pressure

Solution Approach 1:

The patent uses dynamic gate current adjustment during the mirror period to control the rate of change of current (di/dt). This dynamic control reduces turn-on switching loss by optimizing the switching trajectory while simultaneously limiting turn-off surge voltage by preventing excessive current changes.

Inventive Principle:
Principle #15Dynamics

3Loss of energy

If gate current is increased to improve switching performance, then switching loss reduces, but device complexity increases

Engineering Contradiction:
Improveswitching lossVSAvoidcontrol circuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the gate drive into distinct phases: a first period with constant gate current and a mirror period with modulated gate current. This segmentation allows simplified control during most of the switching cycle while applying complex modulation only when needed during the mirror period.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by implementing gate current modulation only during the specific mirror period rather than throughout the entire switching cycle. This partial intervention achieves the necessary switching loss reduction and noise control without requiring complex control throughout all operating phases.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11757444B2Semiconductor element drive device and power conversion apparatus
Publication Date: 2023.09.12 ASTEMO LTD
  • US11757444B2 patent drawing
  • US11757444B2 patent drawing
  • US11757444B2 patent drawing

AI summary

A semiconductor element drive device is provided to solve a problem that because a case of a change in the temperature of the semiconductor element or a current flowing through the semiconductor element is not take into consideration, switching loss and noise cannot be reduced sufficiently. In accordance with input sensing information (temperature T, current I), a timing control unit 3 outputs a delay signal Q to control timing of driving a current increasing circuit 5 so that a reduction of switching loss of an IGBT 101 is maximized. When the IGBT 101 is in turn-on mode or turn-off mode, the current increasing circuit 5 outputs a drive signal in response to the delay signal Q delayed by a given time from output of the drive instruction signal P. In this way, the current increasing circuit 5 increases the current that causes the gate capacitor of the IGBT 101 to be charged/discharged in response to the delay signal Q, thereby increasing a switching speed to reduce switching loss.