IGBT Layer Structure for ON-Voltage and Switching-Loss Control
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Solution Overview
Problem
Semiconductor devices, such as IGBTs, face a trade-off challenge in controlling the relationship between ON voltage and switching loss, where existing methods like carrier lifetime control are complex and difficult to manage effectively.
Innovation Solution
The semiconductor device incorporates a specific layer structure with a drift layer, buffer layers, and collector layers of varying impurity concentrations, allowing for precise control of impurity profiles and ion implantation to optimize the trade-off between ON voltage and switching loss without relying on carrier lifetime control methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If carrier lifetime control method is used to control the trade-off relationship between ON voltage and switching loss, then the trade-off relationship can be controlled, but the method is complex and difficult to manage effectively
Solution Approach 1:
The invention extracts and eliminates the complex carrier lifetime control step from the manufacturing process. Instead of injecting charged particles or heavy metals to create recombination centers, the patent uses a simple multi-layer semiconductor structure with naturally occurring impurity profiles to achieve the same trade-off control between ON voltage and switching loss, significantly simplifying the manufacturing process
Solution Approach 2:
The invention changes the approach from modifying carrier lifetime through particle injection to controlling impurity concentration profiles through layer structure design. By varying the impurity concentrations in different layers (P- layer, P layer, P+ layer) and their spatial distribution, the patent achieves effective control of the trade-off relationship without complex carrier lifetime control methods
2Reliability
If a P- layer is added to prevent collector short circuit and support the P+ layer, then reliability is improved, but the ability to control the relationship between ON voltage and switching loss is reduced
Solution Approach 1:
The invention segments the semiconductor structure into multiple functional layers with distinct impurity concentration ranges. The P- layer (1×10^16 to 1×10^18 atoms/cm³), P layer (1×10^18 to 1×10^20 atoms/cm³), and P+ layer (>1×10^20 atoms/cm³) each serve specific functions while collectively providing both mechanical support and electrical performance control, enabling simultaneous achievement of reliability and controllability
Solution Approach 2:
The invention applies local quality by assigning different impurity concentrations to different spatial regions. The P- layer provides mechanical support and defect tolerance, the P layer optimizes carrier transport, and the P+ layer ensures low contact resistance. This localized optimization of impurity profiles enables both structural reliability and precise electrical characteristic control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate control of the trade-off characteristic between ON voltage and switching loss, improving the performance of IGBTs by reducing both ON voltage and switching loss, and eliminating the need for complex carrier lifetime control methods.
Implementation Method 1
allowing for precise control of impurity profiles and ion implantation to optimize the trade-off between ON voltage and switching loss
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a drift layer of a first conductivity type, a buffer layer of the first conductivity type, a first semiconductor layer, and a second semiconductor layer. The first semiconductor layer and the second semiconductor layer are provided on the side of the second main surface of the semiconductor substrate with respect to the buffer layer. The first semiconductor layer and the second semiconductor layer are arranged in this order in a direction from the second main surface toward the first main surface of the semiconductor substrate. The first semiconductor layer and the second semiconductor layer have conductivity types identical to each other. The second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer.