IGBT Plasma Enhancement Layer Design for Low On-State Losses
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Solution Overview
Problem
Prior art insulated gate bipolar transistors (IGBTs) with highly doped enhancement layers suffer from premature breakdown and reduced reverse blocking safe operating area (RBSOA) capabilities due to increased electric fields, leading to hot carrier injection and threshold voltage instabilities, especially under hard switching conditions.
Innovation Solution
A power semiconductor device is designed with a plasma enhancement layer and a p-doped protection pillow, where the plasma enhancement layer provides benefits without the drawbacks of high doping concentrations, and the protection pillow delays impact ionization, thereby increasing device robustness and reducing on-state losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a highly doped enhancement layer is used, then on-state losses are reduced, but breakdown voltage and reverse blocking safe operating area deteriorate
Solution Approach 1:
The enhancement layer is segmented into two distinct regions: a first enhancement layer with higher doping concentration (1E16 to 1E17 cm^-3) near the emitter for low on-state losses, and a second enhancement layer with lower doping concentration (1E15 to 1E16 cm^-3) near the drift layer for maintained breakdown voltage. This segmentation allows each region to optimize for its specific function without compromising the other.
Solution Approach 2:
Different doping concentrations are applied to different spatial locations within the enhancement layer. The region adjacent to the emitter contact has higher doping to reduce contact resistance and on-state voltage drop, while the region adjacent to the drift layer has lower doping to maintain electric field distribution and breakdown characteristics. This local quality variation resolves the contradiction between low on-state losses and high breakdown voltage.
2Quantity of substance
If a highly doped enhancement layer is used, then plasma concentration is increased, but electric field increases causing hot carrier injection and threshold voltage instability
Solution Approach 1:
The enhancement layer is divided into two doping regions to separate the functions of plasma generation and electric field control. The first enhancement layer with higher doping concentration provides sufficient plasma concentration for low on-state resistance, while the second enhancement layer with lower doping concentration acts as a buffer that prevents excessive electric field buildup at the enhancement layer/drift layer interface, thereby preventing hot carrier injection and threshold voltage instability.
Solution Approach 2:
The second enhancement layer with intermediate doping concentration serves as a mediator between the highly doped first enhancement layer and the lightly doped drift layer. It transitions the doping profile gradually, preventing abrupt changes in electric field that would cause hot carrier effects and threshold voltage instability, while still maintaining adequate plasma concentration from the first enhancement layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves lower on-state losses and higher breakdown voltage with improved reliability, reduced risk of hot carrier injection, and enhanced robustness against avalanche breakdown, while maintaining reduced turn-off energy and overvoltage.
Implementation Method 1
an n doped plasma enhancement layer 9, 9' having higher doping concentration than the drift layer 5 covers an edge region between the protection pillow 8 and the trench gate electrode 7, 7'
Implementation Method 2
the protection pillow delays impact ionization, thereby increasing device robustness
Implementation Method 3
a first electrically insulating layer 72, which surrounds and thus separates the gate layer 70 from the drift layer 5, base layer 4 and the source layer 3
Data Source
AI summary
An insulated gate power semiconductor device includes an (n-) doped drift layer between an emitter side and a collector side. A p doped protection pillow covers a trench bottom of a trench gate electrode. An n doped enhancement layer having a maximum enhancement layer doping concentration in an enhancement layer depth separates the base layer from the drift layer. An n doped plasma enhancement layer having a maximum plasma enhancement layer doping concentration covers an edge region between the protection pillow and the trench gate electrode. The N doping concentration decreases from the maximum enhancement layer doping concentration towards the plasma enhancement layer and the N doping concentration decreases from the maximum plasma enhancement layer doping concentration towards the enhancement layer such that the N doping concentration has a local doping concentration minimum between the enhancement layer and the plasma enhancement layer.