IGBT Recess Structure for Low On-Voltage and High Withstand Voltage
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Solution Overview
Problem
Semiconductor devices with insulated gate bipolar transistor (IGBT) structures face a tradeoff between withstand voltage and on-voltage, and existing methods to lower on-voltage while maintaining high withstand voltage either increase manufacturing processes or fail to effectively spread the depletion layer.
Innovation Solution
A semiconductor device design featuring a recess structure with a wide recess width and a specific ratio of recess width to base region width, which allows for hole accumulation and improved conductivity modulation without the need for a carrier accumulation layer, thereby reducing on-voltage while maintaining high withstand voltage and minimizing manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a carrier accumulation layer with higher impurity concentration than the drift region is formed between the base region and collector region, then the on-voltage can be lowered, but the number of manufacturing processes increases and the depletion layer cannot spread favorably
Solution Approach 1:
The invention extracts and eliminates the carrier accumulation layer from the IGBT structure, replacing it with a simplified design where the drift region extends directly to the collector region interface. This removal of the intermediate layer reduces manufacturing complexity while maintaining the ability to control on-voltage through drift region parameters alone.
Solution Approach 2:
The invention changes the critical parameter from impurity concentration in a carrier accumulation layer to the thickness and doping profile of the drift region. By controlling the drift region's parameters (thickness, doping concentration gradient), the patent achieves on-voltage control without requiring an additional carrier accumulation layer, thus simplifying the manufacturing process.
2Loss of energy
If a carrier accumulation layer with higher impurity concentration than the drift region is formed between the base region and collector region, then the on-voltage can be lowered, but the depletion layer cannot spread favorably affecting withstand voltage
Solution Approach 1:
The invention changes the approach from modifying impurity concentration in a separate carrier accumulation layer to optimizing the drift region's thickness and doping profile. The drift region is designed with a specific concentration gradient that enables both low on-voltage (through efficient carrier injection) and high withstand voltage (through controlled depletion layer expansion into the drift region).
Solution Approach 2:
The invention transitions from a lateral impurity concentration variation (in the carrier accumulation layer) to a vertical depth-dependent doping profile in the drift region. By controlling the doping concentration as a function of depth from the surface, the patent achieves both low on-voltage and high withstand voltage through the vertical dimension of the drift region structure.
3Reliability
If the drift region is designed to allow favorable depletion layer spread for high withstand voltage, then the on-voltage increases, creating a tradeoff relationship
Solution Approach 1:
The invention uses a graded doping profile in the drift region where the impurity concentration varies continuously with depth. The concentration is highest at the surface and decreases toward the collector region interface. This gradient enables the depletion layer to spread favorably during high-voltage operation (improving withstand voltage) while maintaining sufficient carrier injection capability for low on-voltage operation.
Solution Approach 2:
The invention applies different doping concentrations at different depths within the drift region. The upper portion has higher doping to facilitate carrier injection and reduce on-voltage, while the lower portion has lower doping to allow extensive depletion layer spread for high withstand voltage. This spatial variation in local quality resolves the tradeoff between the two parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively lowers on-voltage and increases withstand voltage without increasing manufacturing processes, achieving a balanced performance by optimizing the recess width and interval configuration.
Implementation Method 1
it has been found that when a gate electrode is formed in a recess, carriers are accumulated at a corner portion of the gate electrode, so that an electric field is concentrated
Implementation Method 2
which allows for hole accumulation and improved conductivity modulation without the need for a carrier accumulation layer
Data Source
AI summary
A semiconductor device includes: a first semiconductor region; a second semiconductor region, which is arranged on the first semiconductor region; a third semiconductor region, which is arranged on the second semiconductor region; a plurality of fourth semiconductor regions, each of which is arranged with being spaced from each other on the third semiconductor region; a insulation film arranged on a inner wall of a recess, which extends from upper faces of the fourth semiconductor region to pass through the third semiconductor region and the fourth semiconductor region and reaches the second semiconductor region; a control electrode, a first main electrode, a second main electrode, which is electrically connected to the third semiconductor region and the fourth semiconductor region, wherein a ratio of a width of the recess to a width of the third semiconductor region abutting on the second main electrode is 1 or more.