Self-Aligned Resistive Source Extensions for IGBT Latch-Up Prevention
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Solution Overview
Problem
MOS-gated power semiconductor devices face issues with latch-up and excessive power dissipation due to high voltage and current, leading to potential device failure, which existing technologies have not adequately addressed.
Innovation Solution
Introducing a series resistance in the field-effect portion of the device using a self-aligned structure with immobile electrostatic charge or outdiffusion from a doped dielectric to create a resistive source extension, increasing the critical current for latch-up and enhancing the Safe Operating Area (SOA) of IGBTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high voltage and high current are applied to increase power output, then power delivery capability is improved, but local heating increases leading to device failure
Solution Approach 1:
A resistive source extension region is introduced as an intermediary element between the source region and the channel. This intermediate region provides controlled series resistance that limits current density and reduces local heating in high-power operation, preventing device failure while maintaining power delivery capability
Solution Approach 2:
The source extension region is localized specifically at the source-body junction area where current injection occurs. By concentrating the resistive effect in this specific location rather than uniformly throughout the device, the patent achieves targeted thermal management that protects critical regions while maintaining overall device performance
2Reliability
If source doping concentration is increased to reduce on-resistance, then conductivity is improved, but latch-up susceptibility increases
Solution Approach 1:
The resistive source extension region is formed in advance during fabrication, creating a built-in protective barrier before the device enters operation. This preliminary structural modification ensures that even when source doping is increased for low on-resistance, the extension region pre-limits current density and prevents latch-up conditions from developing
Solution Approach 2:
The source extension region provides preliminary opposition to excessive current flow that would otherwise trigger latch-up. By introducing this resistive element beforehand, the patent counteracts the harmful effect of high source doping before it can lead to latch-up, allowing aggressive doping profiles to be used safely
3Reliability
If series resistance is added to prevent latch-up, then latch-up resistance is improved, but voltage drop increases reducing efficiency
Solution Approach 1:
The series resistance is localized specifically in the source extension region at the source-body junction, rather than being distributed throughout the entire current path. This concentrated local resistance provides effective latch-up protection while minimizing the total voltage drop, as the extension region occupies a small portion of the overall current flow path
Solution Approach 2:
The patent carefully controls the resistance value of the source extension region by adjusting its geometry and doping profile. By optimizing these parameters, the extension provides sufficient resistance to prevent latch-up (requiring elevated base-emitter voltage) while keeping the voltage drop small enough to maintain device efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves resistance to latch-up, increases the electrical short circuit SOA, enhances reliability, and increases the ruggedness and gain of IGBTs, allowing them to operate safely under higher current conditions without losing gate control.
Implementation Method 1
a source extension region which connects said source region to said channel, and is more resistive than said source region; wherein said source extension region is generated by a dielectric layer which contains immobile electrostatic charge
Implementation Method 2
or by outdiffusion from a doped dielectric
Data Source
AI summary
Devices, structures, and related methods for IGBTs and the like which include a self-aligned series resistance at the source-body junction to avoid latchup. The series resistance is achieved by using a charged dielectric, and/or by using a dielectric which provides a source of dopant atoms of the same conductivity type as the source region, at a sidewall adjacent to the source region.


