IGBT With Segmented Gate Electrodes for ON-Resistance and Switching Speed Trade-off
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Solution Overview
Problem
Semiconductor devices like IGBTs face a trade-off between low ON-resistance and fast switching speed, where reducing ON-resistance increases carrier discharge time and vice versa, affecting steady and switching losses.
Innovation Solution
The semiconductor device incorporates a structure with alternating first and second control electrodes inside a semiconductor body, with a third insulating layer between them, allowing for controlled carrier accumulation and discharge by adjusting gate voltages, thereby optimizing ON-resistance and switching speed without increasing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the trench gate extends deeply into the n-type base layer to increase carrier accumulation, then ON-resistance is reduced, but carrier discharge time increases and switching speed is reduced
Solution Approach 1:
The gate structure is segmented into multiple independent gates (first gate, second gate, third gate) arranged in the depth direction. Each gate can be independently controlled with different voltages, allowing separate optimization of carrier accumulation (for low ON-resistance) and carrier discharge (for fast switching) by applying different voltage levels to different gates during turn-off operation
Solution Approach 2:
The gate voltages are applied in a periodic sequence during switching operation. During turn-off, voltages are ramped down in a specific sequence (first gate voltage ramped down first, then second, then third), creating a time-dependent control pattern that accelerates carrier discharge while maintaining low ON-resistance during the on-state
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances turn-off speed while maintaining low ON-resistance, allowing for efficient operation in power converters by controlling the timing and ramp-down of gate voltages applied to the control electrodes.
Implementation Method 1
the first control electrode and the second control electrode are arranged alternately in a first direction... The first control electrode contacts the third insulating layer at the first surface, and the second control electrode contacts the third insulating layer at the second surface
Data Source
AI summary
A semiconductor device includes a semiconductor body including first to fourth semiconductor layers. The second semiconductor layer of second conductivity type is provided on the first semiconductor layer of first conductivity type; the third semiconductor layer of first conductivity type is provided selectively on the second semiconductor layer; and the fourth semiconductor layer of second conductivity type is provided selectively on the second semiconductor layer. The semiconductor device further includes first and second control electrodes. The first and second control electrodes are provided inside the semiconductor body and oppose the second semiconductor layer with first and second insulating films interposed, respectively, and are arranged alternately with a third insulating layer interposed. The first control electrode contacts the third insulating layer at a first surface thereof, and the second control electrode contacts the third insulating layer at a second surface opposite to the first surface.