IGBT SiGe Collector Layer for Leakage and Dislocation Suppression
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Solution Overview
Problem
High-speed switching and reverse-bias leakage current issues in semiconductor IGBTs are exacerbated by dislocation defects caused by particles on the recrystallized surface of the substrate, which are difficult to eliminate, especially in large chip areas handling high voltage and current.
Innovation Solution
Incorporating a dislocation suppressing layer made of silicon germanium (SiGe) that forms a heterojunction with the silicon substrate, positioned deep within the p-type collector layer to prevent dislocation defects from extending and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If particles are present on the recrystallized surface of the substrate, then dislocation defects occur and extend to the n-type field stop layer, but leakage current increases and device reliability deteriorates
Solution Approach 1:
A dislocation suppressing layer is introduced as an intermediary between the silicon substrate and the n-type field stop layer. This layer captures and suppresses dislocation defects before they can extend to the field stop layer, thereby preventing leakage current without requiring complete elimination of particles from the substrate surface.
Solution Approach 2:
The dislocation suppressing layer is formed in advance before the n-type field stop layer is created. By establishing this protective layer first, dislocation defects are suppressed at an early stage, preventing them from reaching critical regions and causing leakage failures.
2Ease of manufacture
If laser annealing is used to form the n-type field stop layer and p-type collector layer, then heating can be performed partially on the substrate, but particles on the surface cause dislocation defects during recrystallization
Solution Approach 1:
The dislocation suppressing layer serves as a mediator that allows laser annealing to proceed with partial heating while preventing the formation of dislocation defects. The layer absorbs and mitigates the harmful effects of particles during the recrystallization process induced by laser heating.
3Power
If the chip area is increased to handle high voltage and high electric current, then the IGBT can process higher power, but it becomes practically difficult to completely eliminate particles from the substrate
Solution Approach 1:
The dislocation suppressing layer acts as a buffer that decouples the relationship between chip area and particle contamination. Even as chip area increases and particle elimination becomes more difficult, the suppressing layer ensures that any remaining particles do not cause dislocation defects that would lead to leakage failures.
4Loss of energy
If the n-type field stop layer and p-type collector layer are formed on the thinned back surface of the substrate, then ON resistance is reduced, but the heating process must be limited to maintain impurity profiles
Solution Approach 1:
The dislocation suppressing layer enables the use of laser annealing with controlled partial heating. This allows sufficient heating to maintain low ON resistance while the suppressing layer protects against dislocation defect formation that would occur with more aggressive heating approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SiGe dislocation suppressing layer effectively suppresses dislocation defects and leakage current between the emitter and collector, enhancing the IGBT's performance by reducing ON resistance and switching losses while maintaining high-speed switching capabilities.
Implementation Method 1
a dislocation suppressing layer forming a hetero junction with silicon in the p-type collector layer
Implementation Method 2
the back surface of the substrate SUB is subjected to laser annealing LA to activate the impurity implanted layers NI and PI
Implementation Method 3
about 0.2 μm thickness of silicon on the outermost surface of the back surface BS of the substrate SUB is melted once to form a melting layer ML
Implementation Method 4
After the laser emission, a temperature of the substrate SUB decreases, and the melting layer ML is recrystallized
Implementation Method 5
phosphorus (P) that is an n-type impurity and a boron (B) that is a p-type impurity are sequentially ion-implanted into the back surface BS of the silicon substrate
Data Source
AI summary
An IGBT capable of handling high-speed switching while reducing a leakage current of a semiconductor device including the IGBT is provided. The semiconductor device according to one embodiment includes an IGBT including a p-type collector layer on a back surface of a silicon substrate and a dislocation suppressing layer for forming a hetero junction with silicon in the p-type collector layer. The dislocation suppressing layer includes a silicon germanium (SiGe) layer.