IGBT Source Drain Region Sizing for Anti-Latching
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Solution Overview
Problem
Conventional insulated gate bipolar transistors (IGBTs) suffer from poor electrical performance due to equal-sized source and drain doped regions and ohmic contact regions, leading to increased threshold voltage and resistance, which affects anti-latching ability and reverse turn-off safe operating area.
Innovation Solution
The IGBT design includes varying sizes of source and drain doped regions and ohmic contact regions between different regions, with smaller sizes in the second region to reduce ion concentration impact and enhance diffusion, forming a triode structure with reduced resistance and improved anti-latching effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If equal-sized source and drain doped regions are used, then manufacturing simplicity is maintained, but resistance and threshold voltage increase leading to poor electrical performance
Solution Approach 1:
The patent applies local quality by making source and drain doped regions have different sizes in different regions of the IGBT device. Specifically, the first source/drain doped regions in the first region have a first size, while the second source/drain doped regions in the second region have a second size that is smaller than the first size. This local differentiation optimizes electrical performance by reducing resistance and threshold voltage in specific areas without requiring complete redesign of the entire device structure.
Solution Approach 2:
The patent segments the IGBT device into multiple regions (first region and second region) with different doped region configurations. This segmentation allows independent optimization of electrical characteristics in different areas, enabling the device to achieve lower overall resistance and improved anti-latching effect while maintaining a manageable structural complexity through systematic regional division.
2Manufacturing precision
If larger ohmic contact regions are used, then contact resistance is reduced, but device area increases and manufacturing complexity increases
Solution Approach 1:
The patent implements local quality by varying the size of ohmic contact regions according to their location. The first ohmic contact regions corresponding to the first source/drain doped regions have a first size, while the second ohmic contact regions corresponding to the second source/drain doped regions have a second size that is smaller than the first size. This localized optimization reduces contact resistance where needed while minimizing overall device area by not uniformly enlarging all contact regions.
3Ease of manufacture
If uniform doped region sizes are used, then manufacturing process is simplified, but anti-latching ability and reverse turn-off safe operating area are compromised
Solution Approach 1:
The patent applies local quality by creating different doped region sizes in different areas to specifically enhance anti-latching ability. The varied sizes of source/drain doped regions and corresponding ohmic contact regions create optimal electrical characteristics for preventing latch-up conditions and improving reverse turn-off safe operating area, while the systematic regional approach keeps the manufacturing process manageable through standardized fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the electrical performance by reducing the resistance and threshold voltage, enhancing the anti-latching effect and increasing the reverse turn-off safe operating area of the IGBT.
Implementation Method 1
forming source and drain doped regions and an ohmic contact region in a top region of the well region
Implementation Method 2
enhance diffusion, forming a triode structure with reduced resistance
Data Source
AI summary
An insulated gate bipolar transistor and a method for fabricating the insulated gate bipolar transistor are provided. The insulated gate bipolar transistor includes a semiconductor layer including a bulk layer and a cell region including a first region and a second region. The insulated gate bipolar transistor also includes a well region, a drift region, and a plurality of gate structures in the bulk layer associated with the cell region. Further, the insulated gate bipolar transistor includes source and drain doped regions and an ohmic contact region in a top region of the well region. A size of the source and drain doped regions in the second region is smaller than a size of the source and drain doped regions in the first region. A size of the ohmic contact region in the second region is larger than a size of the ohmic contact region in the first region.