IGBT Trench Gate Structure for Parasitic Capacitance Reduction
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Solution Overview
Problem
Current semiconductor devices, particularly IGBTs, face challenges in optimizing performance and reliability due to misalignment issues during trench formation, leading to variations in electric characteristics and increased parasitic capacitance, which degrade performance and reliability.
Innovation Solution
The semiconductor device incorporates a trench-gate structure with gate electrodes formed on both sides of the semiconductor layer, where gate insulating films are interposed between the semiconductor layer and the gate electrodes, and parts of the insulating layer are present under the gate electrodes, reducing parasitic capacitance and enhancing the Injection Enhancement effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional trench formation methods are used, then manufacturing process is simpler, but misalignment occurs leading to increased parasitic capacitance and degraded performance
Solution Approach 1:
The patent applies preliminary action by forming a preliminary insulating film in the trench before forming the gate electrode. This preliminary film is created at a stage when the trench structure is already established, allowing subsequent gate electrode formation to be precisely aligned relative to the trench boundaries. The preliminary insulating film acts as a reference structure that guides precise alignment in later manufacturing steps, thereby reducing misalignment and parasitic capacitance without requiring higher precision in the trench formation step itself.
2Reliability
If gate electrodes are formed closer to the semiconductor layer, then device performance improves, but parasitic capacitance increases
Solution Approach 1:
The patent uses an insulating film as an intermediary layer positioned between the gate electrode and the semiconductor layer. This intermediary insulating film allows the gate electrode to be formed close to the semiconductor layer for enhanced injection effect, while simultaneously providing electrical isolation that prevents direct capacitive coupling. The insulating film thus mediates between the conflicting requirements of close proximity for performance and separation for low parasitic capacitance.
Data Source
AI summary
An improvement is achieved in the performance of a semiconductor device. Over the main surface of a semiconductor substrate for the n-type base of an IGBT, an insulating layer is formed. In a trench of the insulating layer, an n-type semiconductor layer is formed over the semiconductor substrate and, on both sides of the semiconductor layer, gate electrodes are formed via gate insulating films. In an upper portion of the semiconductor layer, a p-type semiconductor region for a p-type base and an n+-type semiconductor region for an n-type emitter are formed. Under the gate electrodes, parts of the insulating layer are present. The side surfaces of the gate electrodes opposite to the side surfaces thereof facing the semiconductor layer via the gate insulating films are adjacent to the insulating layer.