Dynamic IGPU DGPU Z-Value Load Balancing

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Solution Overview

Problem

In computing systems with integrated (IGPU) and discrete graphics processing units (DGPU), the IGPU often becomes a bottleneck in the graphics pipeline due to its lower processing power, hindering overall system performance since it must finish pre-computing Z-values before the DGPU can begin rendering, especially when the DGPU is more powerful.

Innovation Solution

A method for temporal load balancing across GPUs, where the graphics driver dynamically adjusts the IGPU percentage to pre-compute Z-values for a varying number of pixels, allowing the DGPU to render efficiently using pre-computed Z-values, and redistributes work based on processing times to optimize performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the IGPU pre-computes Z-values for all pixels before the DGPU renders, then the DGPU can use pre-computed Z-values to avoid unnecessary shading operations, but the IGPU becomes a bottleneck in the graphics pipeline due to its lower processing power

Engineering Contradiction:
Improveunnecessary shading operationsVSAvoidoverall system performance
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent implements dynamic workload distribution where the IGPU processes a percentage of pixels for Z-value pre-computation rather than all pixels. The graphics driver dynamically adjusts the IGPU percentage based on performance metrics, allowing the system to adapt between fully utilizing the IGPU for pre-computation (when it helps) and reducing its workload (when it becomes a bottleneck), thus resolving the contradiction between energy efficiency and productivity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of IGPU workload from a fixed 100% pixel processing to a variable percentage. By monitoring frame times and performance metrics, the graphics driver adjusts the IGPU percentage parameter to optimize the balance between pre-computation benefits and pipeline throughput, preventing the IGPU from becoming a bottleneck while still achieving energy efficiency when conditions permit

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the IGPU runs one frame ahead of the DGPU to pre-compute Z-values, then the DGPU can benefit from pre-computed depth information, but the IGPU must finish processing before the DGPU can begin, creating a sequential dependency

Engineering Contradiction:
Improverendering accuracyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by having the IGPU process only a percentage of pixels rather than all pixels for Z-value pre-computation. This partial processing reduces the time the IGPU occupies the pipeline, allowing the DGPU to start rendering sooner while still obtaining sufficient depth information for many pixels, thus reducing the sequential dependency and overall processing time while maintaining acceptable rendering accuracy

Inventive Principle:
Principle #16Partial or excessive action

3Power

If the IGPU is substantially less powerful than the DGPU, then the DGPU has higher rendering capability, but the IGPU takes longer to pre-compute Z-values than the DGPU takes to finish rendering the previous frame

Engineering Contradiction:
Improverendering powerVSAvoidpre-computation time
Core Design Contradiction:
PowerVSDuration of action of moving object

Solution Approach 1:

The system dynamically adjusts the IGPU's processing percentage based on the observed performance gap between IGPU pre-computation time and DGPU rendering time. When the IGPU takes too long, the percentage is reduced to prevent pipeline stalls. This dynamic adjustment allows the system to leverage the IGPU's capabilities when appropriate while avoiding the bottleneck effect when the power disparity causes timing issues

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8427474B1System and method for temporal load balancing across GPUs
Publication Date: 2013.04.23 NVIDIA CORP
  • US8427474B1 patent drawing
  • US8427474B1 patent drawing
  • US8427474B1 patent drawing

AI summary

One embodiment of the present invention sets forth a method for dynamically load balancing rendering operations across an IGPU and a DGPU. For each frame, the graphics driver configures the IGPU to pre-compute Z-values for a portion of the display surface and to write feedback data to the system memory indicating the time that the IGPU used to process the frame. The graphics driver then configures the DGPU to use the pre-computed Z-values while rendering to the complete display surface and to write feedback data to the system memory indicating the time that the DGPU used to process the frame. The graphics driver uses the feedback data from the IGPU and DGPU in conjunction with the percentage of the display surface that the IGPU Z-rendered for the frame to scale the portion of the display surface that the IGPU Z-renders for one or more subsequent frames. In this fashion, overall processing within the graphics pipeline is optimized across the IGPU and DGPU.