IGTO Turn-Off Transistor for Latch-Up Recovery
Solution Overview
Problem
Existing IGTO devices require a large negative gate voltage to turn off after latch-up, which is inconvenient and can lead to high on-resistance, acting as a thyristor during latch-up.
Innovation Solution
The IGTO device incorporates upper p+ regions on both sides of the n+ source region and an n layer between the p-well and these p+ regions, forming a p-channel MOSFET that can be turned on with a slightly negative gate voltage to short the base-emitter of the wide-base vertical NPN transistor, allowing the device to turn off with a smaller negative gate voltage, even during latch-up.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large negative gate voltage is applied to turn off the device after latch-up, then the device can be turned off, but the on-resistance increases and operation becomes inconvenient
Solution Approach 1:
The invention segments the turn-off function by introducing a dedicated turn-off transistor (third transistor) that operates independently from the main power transistors. This turn-off transistor is controlled by a separate gate electrode and works specifically to extract carriers and turn off the device after latch-up, allowing the main gate to operate at lower voltages during normal switching.
Solution Approach 2:
The turn-off transistor acts as an intermediary mechanism between the gate control and the main power transfer. It provides a controlled path for carrier extraction without requiring the main gate to apply large negative voltages, thus mediating the turn-off process in a way that protects the main switching elements from high voltage stress.
2Power
If the device acts as a thyristor during latch-up, then high current can be handled, but the on-resistance becomes too high for efficient operation
Solution Approach 1:
The turn-off transistor is prepared in advance (pre-positioned and pre-biased) to activate immediately when latch-up occurs. It preemptively provides a carrier extraction path before the device can enter a high-resistance thyristor state, enabling efficient turn-off while maintaining low on-resistance during the critical latch-up recovery phase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the IGTO device to be turned off with a significantly smaller negative gate voltage compared to prior art, reducing the on-resistance and preventing regenerative action during latch-up, thus improving the device's turn-off capability.
Implementation Method 1
forming a p-channel MOSFET that can be turned on with a slightly negative gate voltage to short the base-emitter of the wide-base vertical NPN transistor
Implementation Method 2
electrons from the n+ source region 18 become the majority carriers along the gate sidewalls and below the bottom of the trenches in an inversion layer, causing the effective width of the NPN base (the portion of the p-well 14 between the n-layers) to be reduced
Data Source
AI summary
An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an nā epi layer, a p-well, vertical insulated gate regions formed in the p-well, and n+ regions between the gate regions, so that vertical NPN and PNP transistors are formed. The device is formed of a matrix of cells. To turn the device on, a positive voltage is applied to the gate, referenced to the cathode. The cells further contain a vertical p-channel MOSFET, for shorting the base of the NPN transistor to its emitter, to turn the NPN transistor off when the p-channel MOSFET is turned on by a slight negative voltage applied to the gate. This allows the IGTO device to be more easily turned off while in a latch-up condition, when the device is acting like a thyristor.