IGZO Array Substrate Halftone Mask Process
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Solution Overview
Problem
The manufacturing methods for top-gate IGZO TFT devices are complicated and costly due to the requirement of multiple masks in the array substrate process.
Innovation Solution
A method involving the continuous deposition of indium gallium zinc oxide and a second metal layer using a halftone mask, followed by annealing and excimer laser irradiation to form conductive regions, reducing the number of masks needed from seven to five and simplifying the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional TG-IGZO TFT manufacturing methods are used, then the device performance requirements are met, but the manufacturing process becomes complicated and costs increase due to requiring about seven masks
Solution Approach 1:
The patent combines the formation of the active layer and source/drain electrodes into a single continuous deposition step using a halftone mask. The halftone mask enables simultaneous patterning of the IGZO active layer and metal source/drain layers from one deposited layer, reducing the mask count from seven to five and simplifying the manufacturing process while maintaining device performance
Solution Approach 2:
The halftone mask serves multiple functions: it patterns both the active layer and source/drain electrodes simultaneously, and enables the formation of conductive regions through selective laser irradiation. This multi-functional approach consolidates multiple patterning steps into one, reducing process complexity
2Reliability
If conventional TG-IGZO TFT manufacturing methods are used, then the device structure is achieved, but the manufacturing cost increases due to the large number of mask processes required
Solution Approach 1:
The patent merges multiple patterning operations into a single continuous deposition step using a halftone mask. By depositing IGZO and metal layers simultaneously and patterning both with one mask, the number of mask processes is reduced from seven to five, directly lowering manufacturing costs while achieving the required device structure
Solution Approach 2:
The patent performs preliminary conductorization treatment on specific regions of the active layer before final device assembly. This preliminary action creates conductive regions that will serve as source and drain contacts, eliminating the need for separate contact formation steps and reducing overall manufacturing cost
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the complexity and cost of manufacturing by saving two masks, thereby streamlining the production of array substrates for high-resolution displays.
Implementation Method 1
performing an annealing process on the array substrate, and the second conductorization process includes performing a laser process on the array substrate
Implementation Method 2
a surface of the array substrate is irradiated with an excimer laser light having a wavelength in a range of 300 nm to 315 nm in the laser process
Data Source
AI summary
An array substrate and a method of manufacturing the array substrate are provided. The method includes providing a substrate, sequentially forming a light-shielding layer, a buffer layer, an active layer, a source, a drain, a gate insulating layer, and a gate on the substrate, performing a first conductorization process on a corresponding region of the active layer opposite to the source and the drain, and performing a second conductorization process on another corresponding region of the active layer between the source and the gate and between the drain and the gate.