IGZO Array Substrate Structure for Low-Leakage TFT Displays
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Solution Overview
Problem
Conventional amorphous silicon (a-Si) TFTs in liquid crystal display panels suffer from high off-state leakage current, which leads to distortion and flickering issues at low frequencies, preventing the display from switching to low-frequency refresh modes for power conservation.
Innovation Solution
The array substrate incorporates a metal oxide semiconductor layer with two layers of indium gallium zinc oxide (IGZO) having different oxygen vacancy concentrations, stacked on an amorphous silicon layer, to reduce off-state leakage current and enhance on-state current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon layer is used as semiconductor material, then manufacturing process is simple and ease of manufacture is improved, but off-state leakage current increases and reliability deteriorates
Solution Approach 1:
The patent uses a composite semiconductor structure consisting of an amorphous silicon layer and a metal oxide semiconductor layer (such as IGZO). The amorphous silicon layer provides ease of manufacturing with existing TFT processes, while the metal oxide semiconductor layer provides low off-state leakage current and high reliability. This composite structure combines the advantages of both materials to resolve the contradiction between ease of manufacture and reliability.
2Reliability
If off-state leakage current is reduced, then reliability is improved, but manufacturing complexity increases and device complexity worsens
Solution Approach 1:
The semiconductor layer is segmented into multiple functional sub-layers: an amorphous silicon layer for manufacturing compatibility and a metal oxide semiconductor layer for low leakage current. This segmentation allows each layer to perform its specific function optimally while maintaining overall device simplicity. The layered structure reduces off-state leakage current without significantly increasing manufacturing complexity because both layers can be deposited using standard sputtering or CVD processes.
3Use of energy by stationary object
If display operates at low frequency, then power consumption is reduced, but distortion and flickering occur due to high leakage current
Solution Approach 1:
The patent changes the electrical parameters of the semiconductor material by introducing a metal oxide semiconductor layer with specific properties (high electron mobility and low off-state leakage current). This parameter change enables the display to operate at low frequencies (such as 1Hz or lower for still images) without experiencing distortion or flickering, because the reduced leakage current maintains stable pixel electrode voltages even during extended off-states between refresh cycles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the off-state leakage current, allowing the display to operate at low frequencies, thereby reducing power consumption and improving response speed.
Implementation Method 1
the second semiconductor layer includes a first metal oxide semiconductor layer and a second metal oxide semiconductor layer stacked on the first metal oxide semiconductor layer, the first metal oxide semiconductor layer and the second metal oxide semiconductor layer are each disconnected at the channel, the oxygen vacancy concentration of the second metal oxide semiconductor layer is less than the oxygen vacancy concentration of the first metal oxide semiconductor layer
Data Source
AI summary
An array substrate includes a substrate; a gate disposed on the substrate; a first insulating layer covering the gate; a first semiconductor layer and a second semiconductor layer that are provided on the first insulating layer, a channel corresponding to the gate being provided in the first semiconductor layer and second semiconductor layer, the second semiconductor layer including a first metal oxide semiconductor layer and a second metal oxide semiconductor layer which are stacked, both the first metal oxide semiconductor layer and the second metal oxide semiconductor layer being disconnected at the channel, and the oxygen vacancy concentration of the second metal oxide semiconductor layer being less than the oxygen vacancy concentration of the first metal oxide semiconductor layer; and a source and a drain that are provided on the second semiconductor layer, both the source and the drain being in electrically conductive contact with the second semiconductor layer.