IGZO Flip-Flop Retention Circuit for Power-Gated Logic Sleep
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Solution Overview
Problem
Conventional flip-flop circuits require an always-on power supply to retain data during power gating, leading to inefficiencies in power management and increased energy consumption.
Innovation Solution
The implementation of low-leakage transistors, such as indium-gallium zinc oxide (IGZO) transistors, in flip-flop circuits that store data using capacitors, allowing data retention without continuous power supply by selectively turning on during transitions between active and sleep states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flip-flop circuits use standard transistors with always-on power supply to retain data, then data retention is reliable, but power consumption increases and power management efficiency deteriorates
Solution Approach 1:
The patent changes the electrical parameters of the transistor by using a thin-film semiconductor layer (such as IGZO) instead of conventional bulk semiconductor. This parameter change enables the transistor to maintain stable off-state characteristics with extremely low leakage current, allowing the flip-flop to retain data reliably even when the power supply is turned off or in low-power mode.
Solution Approach 2:
The patent replaces the conventional power-gating mechanism (which requires maintaining power to retention circuits) with a low-leakage transistor-based retention mechanism. The thin-film transistor's inherent low leakage特性 substitutes for the need of continuous power supply, enabling power gating of the entire flip-flop circuit while maintaining data retention.
2Duration of action of stationary object
If conventional flip-flop circuits use always-on power supply for data retention, then data can be retained during sleep state, but power management efficiency decreases
Solution Approach 1:
The thin-film semiconductor layer changes the electrical parameters of the transistor, achieving extremely low off-state leakage current. This parameter change enables the flip-flop to retain data for extended periods (through sleep and idle states) without power, significantly improving power management efficiency by allowing complete power gating of the circuit block.
Solution Approach 2:
The low-leakage transistor inherently maintains data retention capability without requiring external power or control signals during sleep mode. The transistor's physical characteristics (thin-film structure) provide self-service data retention, eliminating the need for always-on power supply to retention circuits.
3Loss of energy
If low-leakage transistors are used to enable power gating, then power consumption reduces, but transistor leakage characteristics become more critical
Solution Approach 1:
The patent uses a composite structure consisting of a thin-film semiconductor layer (such as IGZO) deposited on a substrate. This composite material approach leverages the unique properties of thin-film semiconductors to achieve extremely low off-state leakage current, making the transistor's leakage characteristics highly reliable for power gating applications.
Solution Approach 2:
By changing the semiconductor material parameters (using thin-film structure with specific bandgap properties), the transistor achieves superior off-state characteristics. The thin-film structure parameter change fundamentally improves the transistor's ability to block leakage current, enhancing off-state reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables longer data retention periods without power and reduces the need for an always-on power supply, enhancing power management efficiency and reducing energy consumption.
Implementation Method 1
A capacitor may be coupled between the signal path and ground to store a value of the data signal when the circuit block is in the sleep state
Implementation Method 2
A low-leakage transistor, such as a thin-film transistor (TFT, e.g., an indium-gallium zinc oxide (IGZO) transistor), may be coupled between the capacitor and the signal path
Data Source
AI summary
Embodiments include apparatuses, methods, and systems for a flip-flop circuit with low-leakage transistors. The flip-flop circuit may be coupled to a logic circuit of an integrated circuit to store data for the logic circuit when the logic circuit is in a sleep state. The flip-flop circuit may pass a data signal for the logic circuit along a signal path. A capacitor may be coupled between the signal path and ground to store a value of the data signal when the logic circuit is in the sleep state. A low-leakage transistor, such as an IGZO transistor, may be coupled between the capacitor and the signal path and may selectively turn on when the logic circuit transitions from the active state to the sleep state to store the value of the data signal in the capacitor. Other embodiments may be described and claimed.