IGZO 2T Gain Cell Memory in BEOL for Dense DRAM Integration

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Solution Overview

Problem

High-density memory technologies like 1T-1C eDRAM for multi-core processors incur significant costs and complexity in CMOS manufacturing, particularly due to the need for advanced process steps and complex capacitor structures.

Innovation Solution

The use of c-axis-aligned crystalline indium-gallium-zinc-oxide (CAAC-IGZO) transistors formed in a back-end metal process stack, which reduces manufacturing complexity and allows for lower temperature processing, thereby simplifying the integration of memory cells as on-die L4/LLC memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If 1T-1C eDRAM is used for high-density memory, then memory density is improved, but manufacturing complexity and cost increase

Engineering Contradiction:

Improvememory densityVSAvoidmanufacturing complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent changes the material parameter from conventional silicon-based transistors to IGZO (indium gallium zinc oxide) transistors, which can be fabricated using lower temperature processes and simpler manufacturing steps, thereby reducing manufacturing complexity while maintaining high memory density

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs IGZO transistors that can be manufactured with simpler, less expensive processes compared to advanced CMOS processes required for conventional high-density memory, reducing the cost and complexity burden on the main processor fabrication

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

2Reliability

If advanced CMOS processes are used for memory fabrication, then memory performance is improved, but process cost and complexity increase

Engineering Contradiction:

Improvememory performanceVSAvoidprocess cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent segments the memory fabrication process from the main processor fabrication by using IGZO transistors that can be manufactured with separate, simpler processes, allowing the memory to be added without requiring the entire system to use costly advanced CMOS processes

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The IGZO transistor acts as an intermediary component that bridges the gap between simple memory structures and advanced performance requirements, providing adequate memory performance through material properties rather than complex fabrication processes

Inventive Principle:

Principle #24Intermediary (Mediator)

3Quantity of substance

If capacitor structures are added to increase memory density, then storage capacity is improved, but device complexity increases

Engineering Contradiction:

Improvestorage capacityVSAvoidcapacitor structure complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges the transistor and capacitor functions into a unified 1T-1C structure where the IGZO transistor serves both as the access device and the storage element, eliminating the need for separate complex capacitor structures while maintaining high storage capacity

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS20250031453A1Two transistor gain cell memory with indium gallium zinc oxide

Publication Date: 2025.01.23 INTEL CORP

AI summary

An example two transistor (2T) gain cell memory with indium-gallium-zinc-oxide (IGZO) transistors. Examples include IGZO transistors included in a dynamic random access memory (DRAM) cell. The IGZO transistors included in the DRAM cell are described as being formed or created in a back end (BE) metal process stack of an integrated circuit chip or die.