IGZO Thin Film Transistor Array Panel with Integrated Electrode Protection
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Solution Overview
Problem
Conventional thin film transistor array panels require six mask processes, resulting in a complex and costly fabrication process due to the need for a protective layer/passivation layer, which increases production costs.
Innovation Solution
A thin film transistor array panel is fabricated using a substrate with a gate electrode, semiconductor layer, source and drain electrodes, and an etch stop layer, where the semiconductor layer is formed using indium gallium zinc oxide, and the electrodes are formed through a reduced number of mask processes, eliminating the need for a protective layer and combining two mask processes into one, thereby simplifying the process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective layer/passivation layer is added to protect the semiconductor layer, then the electrical stability is improved, but the number of mask processes increases from four to six, increasing fabrication complexity and cost
Solution Approach 1:
The patent combines the protective function with the electrode layer by forming the electrode layer over both the source/drain electrodes and the semiconductor layer. This integration eliminates the need for a separate protective layer while maintaining protection of the semiconductor layer, thereby reducing the number of mask processes from six to four without compromising electrical stability
Solution Approach 2:
The electrode layer is designed to serve multiple functions: it acts as both the conductive electrode structure and the protective overlay for the semiconductor layer. This multi-functionality allows the electrode layer to replace the traditional separate protective layer, simplifying the fabrication process while ensuring electrical stability
2Reliability
If six mask processes are used in conventional fabrication, then the protective layer can be formed, but the fabrication cost and process time increase
Solution Approach 1:
The patent merges the formation of the electrode layer with the protective function by designing the electrode layer to extend over the semiconductor layer. This combination allows two functions (electrode formation and protection) to be achieved in one process step, reducing the total number of mask processes from six to four and improving fabrication efficiency
Solution Approach 2:
The electrode layer is designed in advance to serve dual purposes: as the functional electrode and as the protective overlay. By planning this multi-functional structure from the beginning, the patent eliminates the need for subsequent separate protective layer formation steps, thereby reducing process time and cost
Data Source
AI summary
A thin film transistor array panel and a method of fabricating the same are described. The thin film transistor array panel has: a substrate; a gate electrode; a semiconductor layer; a source electrode; a drain electrode; an insulating layer; an etch stop layer disposed on the semiconductor layer and the insulating layer; a first electrode portion disposed on the source electrode for covering and protecting the source electrode; a second electrode portion disposed on the drain electrode for covering and protecting the drain electrode. Thus, the fabricating process can be simplified and the fabricating cost is reduced.