IGZO Thin Film Transistor Threshold Voltage Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing OLED devices face challenges in achieving high reliability and low power consumption due to issues with threshold voltage stability and leakage currents in thin film transistors, particularly in oxide-based transistors.
Innovation Solution
The implementation of a display device structure that includes indium-gallium-zinc oxide (IGZO) active patterns with specific thickness, density, and refractive index ranges, combined with tailored insulating and gate insulation layers, to achieve target threshold voltages and reduce leakage currents. This structure involves a multi-layered insulating interlayer configuration using silicon nitride and silicon oxide, and a titanium-molybdenum gate pattern to control hydrogen diffusion and trap sites.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If oxide-based thin film transistors are used to drive OLED pixels, then power consumption is reduced, but threshold voltage stability and reliability deteriorate due to leakage currents
Solution Approach 1:
The patent applies parameter changes by precisely controlling the thickness of the IGZO active layer (150-400 Å) and adjusting deposition parameters to achieve specific density (6.3-6.6 g/cm³) and refractive index (1.92-1.93) ranges. These parameter optimizations resolve the contradiction by achieving both low power consumption and improved threshold voltage stability through material property tuning
Solution Approach 2:
The patent uses composite material structures with multiple insulating interlayers (first insulating interlayer with silicon nitride and silicon oxide, second insulating interlayer with silicon oxide and silicon nitride) combined with the IGZO active layer. This composite approach addresses the reliability issue by creating a structured system that controls hydrogen diffusion and trap sites while maintaining the low power consumption benefit of oxide-based transistors
2Reliability
If insulating interlayers are added to control hydrogen diffusion, then threshold voltage stability improves, but device complexity increases
Solution Approach 1:
The patent segments the insulating interlayer into multiple distinct layers with specific material compositions and thicknesses. The first insulating interlayer (300-3000 Å silicon nitride, 50-5000 Å silicon oxide) and second insulating interlayer (500-5000 Å silicon oxide, 1000-5000 Å silicon nitride) are separately optimized to perform specific functions in controlling hydrogen diffusion, thereby improving threshold voltage stability through structured complexity
Solution Approach 2:
The insulating interlayers serve as intermediary layers between the IGZO active layer and other device components. These intermediary layers mediate hydrogen diffusion control and trap site management, resolving the contradiction by introducing controlled intermediate structures that improve reliability without excessive complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in high-reliability thin film transistors with stable threshold voltages and reduced off-leakage currents, leading to decreased power consumption and improved image maintenance in OLED devices.
Implementation Method 1
The implementation of a display device structure that includes indium-gallium-zinc oxide (IGZO) active patterns with specific thickness, density, and refractive index ranges, combined with tailored insulating and gate insulation layers, to achieve target threshold voltages and reduce leakage currents
Implementation Method 2
This structure involves a multi-layered insulating interlayer configuration using silicon nitride and silicon oxide, and a titanium-molybdenum gate pattern to control hydrogen diffusion and trap sites
Data Source
AI summary
A display device includes a first thin film transistor disposed on a substrate. A first insulating interlayer covers the first thin film transistor. An active pattern is disposed on the first insulating interlayer. The active pattern includes indium-gallium-zinc oxide (IGZO) having a thickness in a range of about 150 Å to about 400 Å. A gate insulation layer covers the active pattern. A gate pattern is disposed on the gate insulation layer. A second insulating interlayer covers the gate pattern.