IGZO Thin-Film Transistor Layout for Light Stability and Transmittance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Thin-film transistors using IGZO as the active layer suffer from poor light stability, necessitating larger gate electrodes for shielding, which compromises the transmittance of the display substrate.
Innovation Solution
The design of the thin-film transistor includes an active layer with specific boundary configurations and electrode placements that allow for effective light shielding without increasing the gate electrode's length, thereby maintaining transmittance and reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode size is increased to shield the thin-film transistor, then the illumination stability is improved, but the transmittance of the display substrate deteriorates
Solution Approach 1:
The patent rotates the gate electrode 90 degrees so that its extending direction is parallel to the gate line direction. This dimensional reorientation allows the gate electrode to provide light shielding in the width direction without increasing its length in the direction that would block more light, thus improving illumination stability while maintaining transmittance.
Solution Approach 2:
The patent optimizes the gate electrode width to be 3-7 μm, providing localized light shielding exactly where needed (over the active layer) without unnecessarily increasing the overall electrode size. This localized approach shields the transistor from light exposure while minimizing the impact on display substrate transmittance.
2Reliability
If the gate electrode width is increased to provide light shielding, then the illumination stability is improved, but the parasitic capacitance increases
Solution Approach 1:
By rotating the gate electrode configuration, the patent achieves light shielding through optimized width (3-7 μm) rather than increasing length. This dimensional change reduces the overlapping area between the gate electrode and source/drain electrodes, thereby minimizing parasitic capacitance while still providing adequate light shielding for illumination stability.
3Reliability
If the gate electrode length is increased to shield the active layer, then the light stability is improved, but the transmittance and device complexity increase
Solution Approach 1:
The patent employs an asymmetric gate electrode configuration where the width is specifically optimized to 3-7 μm while the length is kept minimal. This asymmetric design provides effective light shielding through the optimized width dimension without requiring excessive length, thereby improving light stability while avoiding increased device complexity.
Data Source
AI summary
Provided are a thin-film transistor and a manufacturing method thereof, and a display substrate, belonging to the technical field of thin-film transistors. The thin-film transistor includes: a base substrate; a gate electrode on the base substrate; an active layer on a side of the gate electrode away from the base substrate, an orthographic projection of the active layer onto the base substrate overlapping with an orthographic projection of the gate electrode onto the base substrate; and a first electrode and a second electrode on a side of the active layer away from the base substrate, the first electrode being one of a source electrode and a drain electrode, and the second electrode being the other of the source electrode and the drain electrode. Specifically the active layer includes a channel region corresponding to a gap between the first electrode and the second electrode, and a width direction of the channel region is perpendicular or substantially perpendicular to an extending direction of the gate electrode. According to the embodiments of the present disclosure, the illumination stability of the thin-film transistor can be improved without reducing the transmittance of the substrate.