III-N Gate Structures with Curved Connecting Sections
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Solution Overview
Problem
Conventional silicon-based power transistors suffer from low switching speeds and high electrical noise, while III-Nitride transistors offer superior performance but face issues with gate metal delamination in peripheral edge regions leading to increased off-state leakage and reduced threshold voltage due to chemical cleaning processes.
Innovation Solution
The method involves forming III-Nitride semiconductor devices with interdigitated source and drain fingers, a gate structure comprising straight and connecting sections, and a chemical cleaning process that prevents gate metal delamination by expanding the gate in curved connecting sections in non-active peripheral edge regions, and optionally implanting ions to suppress the 2DEG channel in these areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a chemical cleaning process is used to clean the gate recess, then the gate recess is cleaned of contaminants, but gate metal delamination occurs in peripheral edge regions leading to increased off-state leakage and reduced threshold voltage
Solution Approach 1:
The gate structure is designed with different geometries in different regions: straight sections in active regions and curved connecting sections in peripheral edge regions. This local differentiation allows the cleaning process to be effective in active regions while preventing delamination in peripheral regions where the curved geometry provides stress relief.
Solution Approach 2:
The gate is formed with curved connecting sections in advance, before the chemical cleaning process is applied. This preliminary geometric configuration prevents delamination from occurring during subsequent cleaning operations by reducing stress concentration at the gate-III-N interface in peripheral regions.
2Ease of manufacture
If the gate structure uses only straight sections between source and drain fingers, then manufacturing is simplified, but gate metal delamination occurs in peripheral edge regions
Solution Approach 1:
The gate structure combines straight sections (for ease of manufacture in active regions) with curved connecting sections (for reliability in peripheral regions). This hybrid approach maintains manufacturing simplicity where possible while introducing curvature only where needed to prevent delamination.
3Reliability
If ions are implanted to suppress the 2DEG channel in peripheral edge regions, then off-state leakage is reduced, but the device structure and fabrication process become more complex
Solution Approach 1:
The curved connecting sections are formed as part of the gate structure before device operation, providing a geometric solution to suppress 2DEG formation in peripheral regions. This preliminary structural configuration achieves leakage control without requiring additional ion implantation steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces off-state leakage currents and increases wafer yield by preventing gate metal delamination and maintaining proper threshold voltage, enhancing the performance and reliability of III-Nitride transistors.
Implementation Method 1
cleaning the gate recess using a chemical cleaning process
Implementation Method 2
expanding the gate in curved connecting sections in non-active peripheral edge regions
Implementation Method 3
optionally implanting ions to suppress the 2DEG channel in these areas
Data Source
AI summary
A semiconductor device includes a III-N layer, a plurality of parallel conductive fingers on the III-N layer, an insulator layer over the III-N layer, and a gate. The plurality of parallel conductive fingers includes a source and drain bus, a plurality of source fingers coupled to the source bus and extending from the source bus towards the drain bus to respective source finger ends, and a plurality of drain fingers coupled to the drain bus and extending from the drain bus towards the source bus to respective drain finger ends, the drain fingers being interdigitated between the source fingers. The gate comprises a plurality of straight and a plurality of connecting sections, each straight section between a source finger and adjacent drain finger, and the connecting sections each joining two adjacent straight sections and curving around a respective source or drain finger end.