III-N Passive Component Integration for Parasitic Loss Reduction

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Solution Overview

Problem

In III-N semiconductor-based integrated circuits (ICs), parasitic losses due to signal propagation through IC structures increase with frequency, particularly in RF applications, leading to significant power loss, as passive components are typically located in upper metal layers or off-chip, causing routing-related losses.

Innovation Solution

Integrating resistors and capacitors directly on the same substrate as III-N devices within the IC structure, reducing parasitic losses by placing them in a front-end structure, where they act as integrated components, thereby minimizing routing-related power losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If passive components are located in upper metal layers or off-chip, then device complexity is reduced, but parasitic losses increase significantly

Engineering Contradiction:
Improveintegration structureVSAvoidparasitic losses
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent merges passive components (resistors, capacitors, inductors) with the III-N device by forming them within the same semiconductor structure. The passive components are created using the III-N material layers themselves, eliminating the need for separate upper metal layer interconnects or off-chip components, thus reducing parasitic losses while maintaining integration benefits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions passive components from traditional planar metal layer placement to a vertical dimension by forming them within stacked III-N material layers. This dimensional change allows passive components to be integrated directly at the device level rather than requiring extended routing through upper metal layers, reducing parasitic inductance and resistance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If passive components are integrated on the same substrate, then parasitic losses are reduced, but manufacturing complexity increases

Engineering Contradiction:
Improverouting-related power lossesVSAvoidfabrication process
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The patent employs a universal III-N material system that can serve multiple functions: active device regions, passive component regions, and interconnect structures. The same III-N material layers are used to form both active III-N devices and passive components, allowing a single fabrication process to create all elements without requiring additional manufacturing steps or materials.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent controls the electrical characteristics of passive components by varying parameters of the III-N material layers, such as doping concentration, layer thickness, and composition ratios. By adjusting these parameters during growth, different passive component values (resistance, capacitance, inductance) are achieved without changing the fundamental material system or fabrication process.

Inventive Principle:
Principle #35Parameter changes

3Speed

If frequency of signals increases, then high frequency performance is achieved, but parasitic losses increase significantly

Engineering Contradiction:
Improvesignal frequencyVSAvoidpower loss
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent converts the potentially harmful effect of high-frequency operation (which typically increases parasitic losses) into a benefit by using the III-N material's inherent properties. The wide bandgap and high electron saturation velocity of III-N materials naturally suppress parasitic effects at high frequencies, allowing the system to operate at higher frequencies with reduced power loss compared to traditional materials.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS11587924B2Integration of passive components in III-N devices
Publication Date: 2023.02.21 INTEL CORP
  • US11587924B2 patent drawing
  • US11587924B2 patent drawing
  • US11587924B2 patent drawing

AI summary

Disclosed herein are integrated circuit structures, packages, and devices that include resistors and/or capacitors which may be provided on the same substrate/die/chip as III-N devices, e.g., III-N transistors. An integrated circuit structure, comprising a base structure comprising a III-N material, the base structure having a conductive region of a doped III-N material. The IC structure further comprises a first contact element, including a first conductive element, a dielectric element, and a second conductive element, wherein the dielectric element is between the first conductive element and the second conductive element, and wherein the first conductive element is between the conductive region and the dielectric element. The IC structure further comprises a second contact element electrically coupled to the first contact element via the conductive region.