III-N Semiconductor Structure with Interlayer for High Voltage
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Solution Overview
Problem
Semiconductor structures with III-N materials face challenges in achieving a thick, highly resistive main layer to withstand high voltages while minimizing leakage currents, especially when using a silicon substrate, due to difficulties in growing thick layers and controlling dislocation density and stress.
Innovation Solution
A semiconductor structure with a main layer of III-N materials featuring an interlayer with a lower layer of higher dislocation density and an upper layer formed as a superlattice, which compresses the main layer and limits leakage currents, and is grown using specific temperature and doping techniques to enhance crystalline quality and resistivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a thick main layer of III-N material is grown on a silicon substrate, then the structure can withstand higher voltages, but the manufacturing difficulty increases significantly
Solution Approach 1:
The patent divides the buffer layer into multiple sections with different aluminum concentrations (first buffer layer section with 0-10% Al, second buffer layer section with 10-30% Al). This segmentation allows each section to serve different functions: the first section promotes epitaxial growth on silicon substrate, while the second section provides stress compensation and dislocation filtering, thereby enabling thick main layer growth without increasing manufacturing difficulty
Solution Approach 2:
The patent systematically varies the aluminum concentration parameter across different buffer layer sections (0-10%, 10-30%, and optional 30-60% sections). This parameter change strategy enables control over lattice matching, stress distribution, and dislocation density, allowing thick main layers to be grown on silicon substrates while maintaining manufacturing feasibility
2Strength
If the main layer thickness is increased to withstand high voltages, then the voltage withstanding capability improves, but leakage currents increase
Solution Approach 1:
The patent introduces an interlayer composed of AlN and/or AlGaN materials between the buffer layer and the main layer. This interlayer acts as an intermediary that filters dislocations propagating from the buffer layer and provides a high-quality interface for main layer growth. By reducing dislocation density at the critical interface, the interlayer enables thick main layers to withstand high voltages while maintaining low leakage currents through improved crystal quality
Solution Approach 2:
The patent creates different quality zones within the buffer layer structure. The first buffer layer section (0-10% Al) provides good lattice matching for initial growth, the second section (10-30% Al) provides stress compensation and dislocation filtering, and the interlayer provides the highest quality interface. This local quality differentiation allows the thick main layer to achieve both voltage withstanding capability and low leakage current
3Ease of manufacture
If a thick main layer is grown on silicon substrate, then cost and availability improve, but dislocation density and stress control become more difficult
Solution Approach 1:
The buffer layer is segmented into multiple sections with progressively increasing aluminum concentrations. The first section (0-10% Al) ensures good lattice matching with silicon substrate for easy manufacturing, while the second section (10-30% Al) provides stress compensation and dislocation filtering. This segmentation enables silicon substrate usage while maintaining precise control over dislocation density and stress in the thick main layer
Solution Approach 2:
The interlayer of AlN and/or AlGaN serves as a mediator between the silicon substrate and the thick main layer. It provides a high-quality template for epitaxial growth, filtering dislocations from the buffer layer and reducing stress accumulation. This intermediary enables the growth of thick, low-dislocation main layers on inexpensive silicon substrates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure effectively reduces leakage currents and enhances the ability to withstand high voltages, making it suitable for high-performance integrated circuit devices without cracking, as demonstrated by significant reduction in leakage current density across various voltage applications.
Implementation Method 1
an interlayer of III-N material disposed between the first section and the second section in order to compress the second section of the main layer
Implementation Method 2
the lower layer has a higher dislocation density than the upper layer
Data Source
AI summary
A semiconductor structure comprising III-N materials, includes: a support substrate; a main layer of III-N material, the main layer comprising a first section disposed on the support substrate and a second section disposed on the first section; an inter-layer of III-N material, disposed between the first section and the second section in order to compress the second section of the main layer, wherein the structure's inter-layer consists of a lower layer disposed on the first section and an upper layer disposed on the lower layer and formed by a superlattice.