III-N Substrate Contact Layout for Dense High-Current Circuits

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Solution Overview

Problem

Integrating substrate contacts to silicon substrates in GaN devices for maintaining constant bias and handling higher currents is challenging, affecting circuit density and performance.

Innovation Solution

A semiconductor device structure with a III-N semiconductor layer over a substrate, featuring a contact pad, dielectric layers, and metal contacts that establish electrical connections through dielectric layers to the substrate, allowing for efficient substrate contact formation without additional planarization steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional substrate contact integration methods are used, then electrical contact to silicon substrate is achieved, but circuit density is reduced and manufacturing complexity increases

Engineering Contradiction:
Improveelectrical contact reliabilityVSAvoidcircuit density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transitions from traditional planar contact structures to three-dimensional metal sidewall portions that extend vertically along the dielectric layer. This dimensional change increases the contact area between the metal contact and silicon substrate without occupying additional lateral space, thereby maintaining circuit density while improving electrical contact reliability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact structure is segmented into multiple components: metal sidewall portions extending vertically, horizontal metal portions at the substrate interface, and dielectric material filling the contact region. This segmentation allows each component to perform its specific function optimally, with the sidewall portions providing vertical current paths and the horizontal portions ensuring substrate contact

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If additional planarization steps are added to achieve proper substrate contact, then contact formation is improved, but manufacturing complexity and process steps increase

Engineering Contradiction:
Improvecontact formation precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The metal contact structure self-adjusts to achieve proper substrate contact through its three-dimensional geometry. The metal sidewall portions and horizontal portions automatically conform to the substrate surface topology without requiring external planarization steps, eliminating unnecessary manufacturing complexity while maintaining contact precision

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The dielectric layer is formed with predetermined thickness and material properties before metal contact deposition. This preliminary preparation creates a foundation that guides the metal contact formation process, ensuring proper contact geometry is achieved during subsequent metal deposition without requiring additional planarization steps

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250220998A1Iii-n semiconductor device with substrate contact
Publication Date: 2025.07.03 TEXAS INSTRUMENTS INC
  • US20250220998A1 patent drawing
  • US20250220998A1 patent drawing
  • US20250220998A1 patent drawing

AI summary

A semiconductor device, comprising, a semiconductor substrate, a III-N semiconductor layer over the semiconductor substrate, a contact pad on the III-N semiconductor layer, a first dielectric layer over the III-N semiconductor layer, a first metal contact through the first dielectric layer and contacting the contact pad, and a second metal contact, including a first side contacting the first dielectric layer and a second side contacting a second dielectric layer, and contacting the semiconductor substrate.